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게이트와 드리프트 영역 오버랩 길이에 따른 LDMOST 전력 소자의 전기적 특성
하종봉,나기열,조경록,김영석,Ha, Jong-Bong,Na, Kee-Yeol,Cho, Kyoung-Rok,Kim, Yeong-Seuk 한국전기전자재료학회 2005 전기전자재료학회논문지 Vol.18 No.7
In this paper the gate overlap length of the LDMOST is optimized for obtaining longer device lifetime. The LDMOSI device with drift region is fabricated using the $0.25\;{\mu}m$ CMOS Process. The gate overlap lengths on drift region are $0.1\;{\mu}m,\;0.4\;{\mu}m\;0.8\;{\mu}m\;and\;1.1\;{\mu}m$, respectively. The breakdown voltages, on-resistances and hot-carrier degradations of the fabricated LDMOST devices are characterized. The LDMOST device with gate overlap length of $0.4\;{\mu}m$ showed the longest on-resistance lifetime, 0.02 years and breakdown voltage of 22 V and on-resistance of $23\;m\Omega{\cdot}mm^2$.
Operative Treatment for Proximal Phalangeal Neck Fractures of the Finger in Children
강호정,성승용,하종원,윤홍기,한수봉 연세대학교의과대학 2005 Yonsei medical journal Vol.46 No.4
Displacement and inappropriate treatment of a proximal phalangeal neck fracture may result in malunion of the fracture with consequent loss of motion and gross deformity, especially in children. We performed a retrospective study of twenty-four patients who had undergone operative treatment for a proximal phalangeal neck fracture, with a mean follow-up evaluation of 14 months (range: 12-30 months). We analyzed the types of fractures, their causes, operative treatments, complications, and functional outcomes. The age of the patients ranged from 2 to 14 years (average: 4.8 years). Twenty of the 24 patients had open reduction and internal fixation, and fourteen of these 20 patients had criss-cross pin fixation. Four of the 24 patients had closed reduction and percutaneous pinning. The average length of immobilization was 3.5 weeks. Excellent or good results were seen in 18 patients (75%). Two patients had complications, which included volar angular deformity and mild button-hole deformity. We recommend that careful initial radiography, particularly, true lateral view radiographs, be required for proper diagnosis. The best results can only be obtained with accurate anatomical reduction of the fracture and early active motion exercise.
Plasma Assisted ALD 장비를 이용한 니켈 박막 증착과 Ti 캡핑 레이어에 의한 니켈 실리사이드 형성 효과
윤상원,이우영,양충모,하종봉,나경일,조현익,남기홍,서화일,이정희,Yun, Sang-Won,Lee, Woo-Young,Yang, Chung-Mo,Ha, Jong-Bong,Na, Kyoung-Il,Cho, Hyun-Ick,Nam, Ki-Hong,Seo, Hwa-Il,Lee, Jung-Hee 한국반도체디스플레이기술학회 2007 반도체디스플레이기술학회지 Vol.6 No.3
The NiSi is very promising candidate for the metallization in 45 nm CMOS process such as FUSI(fully silicided) gate and source/drain contact because it exhibits non-size dependent resistance, low silicon consumption and mid-gap workfunction. Ni film was first deposited by using ALD (atomic layer deposition) technique with Bis-Ni precursor and $H_2$ reactant gas at $220^{\circ}C$ with deposition rate of $1.25\;{\AA}/cycle$. The as-deposited Ni film exhibited a sheet resistance of $5\;{\Omega}/{\square}$. RTP (repaid thermal process) was then performed by varying temperature from $400^{\circ}C$ to $900^{\circ}C$ in $N_2$ ambient for the formation of NiSi. The process temperature window for the formation of low-resistance NiSi was estimated from $600^{\circ}C$ to $800^{\circ}C$ and from $700^{\circ}C$ to $800^{\circ}C$ with and without Ti capping layer. The respective sheet resistance of the films was changed to $2.5\;{\Omega}/{\square}$ and $3\;{\Omega}/{\square}$ after silicidation. This is because Ti capping layer increases reaction between Ni and Si and suppresses the oxidation and impurity incorporation into Ni film during silicidation process. The NiSi films were treated by additional thermal stress in a resistively heated furnace for test of thermal stability, showing that the film heat-treated at $800^{\circ}C$ was more stable than that at $700^{\circ}C$ due to better crystallinity.
김동석,김성남,김기원,임기식,강희성,곽은환,이정희,이성길,하종봉 한국물리학회 2011 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.58 No.52
An AlGaN/GaN-based normally-off GaN metal-oxide-semiconductor field-effect transistor (MOSFET) with a p-GaN buffer layer and using an over-recessed gate structure has been demonstrated for the first time. The p-GaN buffer layer is believed to have advantages of not only ensuring a fairly positive threshold voltage due to the depletion effect but also reducing the buffer leakage current. The over-recessed gate region and the whole surface of the AlGaN layer were covered with a high-quality atomic layer-deposited (ALD) Al_2O_3 layer, which play a role as an excellent gate insulator in the recessed gate region and a surface passivation layer in the ungated region between the source and the drain. The fabricated GaN MOSFET with 30-nm-thick ALD Al_2O_3 exhibited good device performances, such as a maximum drain current of 109 mA/mm, a maximum extrinsic transconductance of 30 mS/mm, a low specific on-resistance of 1.86 mΩ·cm^2, and a subthreshold slope of 365 mV/dec with a threshold voltage of 2.6 V.