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        • KCI등재

          브랜드의 통합적 아이덴티티 구축을 위한 <공간 디자인과 마케팅>의 융합수업사례

          이진민,장미정 한국기초조형학회 2015 기초조형학연구 Vol.16 No.5

          This study aims to develop a space that combines a design and marketing teaching model that would assist in educating future leaders with fused thinking skills. This study on Environmental Design was conducted during the first semester of 2014 at S University <Brand space marketing>. The case study is in regards to a teaching portfolio format for a course map class. In addition, this study included each of the major faculty to the class in the form of joint participation during a 15 week as a result of the process and observation techniques literature that way. Subject to the observation of the present study <Brand space marketing> class courses are taught in team and personal challenges. Team challenges 1-7 during-week-15 were for things(物) and events(事), 8~15-for people(人) and places (場). Form week 1 to 13 personal challenges were set up to observe the recording and organizing process of self-care brand development. The results of this study are significant in that what has developed is a teaching method for marketing in design focused on future students by professors, in the process becoming a fusion of a design and marketing team by teaching each class. In addition, they deserve a share of the value as interdisciplinary records and data on the results of map <brand marketing space>. 본 연구는 브랜드의 통합적 아이덴티티 구축을 위해 스페이스 디자인과 마케팅 교과목간의 융합수업사례를 준비과정, 수업운영 및 진행, 결과물 그리고 리뷰까지 순차적으로 정리ž고찰함으로써 향후 교과목개발에 있어 좀 더 실효성있는 모형개발의 근간을 마련함을 목적으로 한다. 이에 본 연구는 연구자가 실제 수업지도에 참여한 2014 년 1 학기 S 여대 환경디자인학과의<브랜드스페이스마케팅>교과목을 대상으로 한 티칭포트폴리오 형식의 사례연구이다. 또한 본 연구는 각각의 전공교수(공간환경디자인 2 명, 마케팅 1 명)이 함께 15 주간 참여한 공동수업형태의 결과물로써 그 과정들을 문헌고찰과 실제적인 관찰기법을 비롯하여 결과물의 최종 리뷰의 정량적 분석을 그 방법으로 한다. 연구대상의 수업은 조별과제와 개인별과제로 진행한다. 구체적으로 조별과제는 전반부 1~7 주의 사물(物)과 이벤트(事), 후반부 8~15 주의 인물(人)과 장소(場)를 테마로 하고, 개인별과제는 1~15 주의 자기브랜드개발로 하여 모든 과정들을 관찰ž기록하고 프로세스를 정리한다. 그 중 본 연구는 조별브랜드개발을 중심으로 창의적 디자인 프로세스를 전개하는 단계별, 物ž事ž人ž場의4 가지 대상별로 각각 세부 분석한다. 연구결과, 첫째, 본 연구는 디자인과 마케팅 전공교수가 융합하여 교육함으로써 향후 공간디자인 학생들에게 마케팅적 사고와 동시에 창의적 브랜드 디자인을 하는 교수법개발에 의의가 있다. 둘째, 본 연구는 브랜드를 개발함에 있어 그래픽ž제품ž공간 아이덴티티를 아우르는 통합적 디자인을 꾀한 것에 의의가 있다. 끝으로, 본 연구는 자기발견을 위한 개인브랜드를 개발함과 동시에 팀과의 융합을 꾀하는 양자 간의 균형을 도모하고, 창의적인디자인마케팅 융합교수법을 개발ž수정ž보완ž개선하는 지속적인 과정을 통해 보다 실효성있는 수업내용을 구축한 것에의의가 있다.

        • KCI등재

          스텝 어닐링에 의한 저온 및 고온 n형 다결정 실리콘 박막 트랜지스터의 전기적 특성 분석

          이진민,Lee,,Jin-Min 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.7

          In this paper, experimental analyses have been performed to compare the electrical characteristics of n channel LT(low temperature) and HT(high temperature) poly-Si TFTs(polycrystalline silicon thin film transistors) on quartz substrate according to activated step annealing. The size of the particles step annealed at low temperature are bigger than high temperature poly-Si TFTs and measurements show that the electric characteristics those are transconductance, threshold voltage, electric effective mobility, on and off current of step annealed at LT poly-Si TFTs are high more than HT poly-Si TFT's. Especially we can estimated the defect in the activated grade poly crystalline silicon and the grain boundary of LT poly-Si TFT have more high than HT poly-Si TFT's due to high off electric current. Even though the size of particles of step annealed at low temperature, the electrical characteristics of LT poly-Si TFTs were investigated deterioration phenomena that is decrease on/off current ratio depend on high off current due to defects in active silicon layer.

        • KCI등재

          고온에서 제작된 n채널 다결정 실리콘 박막 트랜지스터의 단채널 효과 연구

          이진민,Lee,,Jin-Min 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.5

          To integrate the sensor driver and logic circuits, fabricating down scaled transistors has been main issue. At this research, short channel effects were analyzed after n channel polycrystalline silicon thin film transistor was fabricated at high temperature. As a result, on current, on/off current ratio and transconductance were increased but threshold voltage, electron mobility and s-slope were reduced with a decrease of channel length. When carriers that develop at grain boundary in activated polycrystalline silicon have no gate biased, on current was increased with punch through by drain current. Also, due to BJT effect (parallel bipolar effect) that developed under region of channel by increase of gate voltage on current was rapidly increased.

        • KCI등재

          누설전류 감소를 위한 Bird's Beak 공정을 이용한 다결정 실리콘 박막 트랜지스터의 구조 연구

          이진민,Lee,,Jin-Min 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.2

          To stabilize the electric characteristic of Silicon Thin Film Transistor, reducing the current leakage is most important issue. To reduce the current leakage, many ideas were suggested. But the increase of mask layer also increased the cost. On this research Bird's Beak process was use to present element. Using Silvaco simulator, it was proven that it was able to reduce current leakage without mask layer. As a result, it was possible to suggest the structure that can reduce the current leakage to 1.39nA without having mask layer increase. Also, I was able to lead the result that electric characteristic (on/off current ratio) was improved compare from conventional structure.

        • KCI등재

          중부 지역 역삼동 유형과 송국리 유형의 관계에 대한 일고찰 - 역삼동 유형의 하한에 주목하여

          이진민 한국고고학회 2004 韓國考古學報 Vol.54 No.-

          '스콜라' 이용 시 소속기관이 구독 중이 아닌 경우, 오후 4시부터 익일 오전 7시까지 원문보기가 가능합니다.

          Excavations of many settlements in chungnam Area since the 1990s has led the study of the Korean Mumun-Pottery Age to a new perspective. But Scholars haven't yet come to the conclusion of the relationship betw- een Yeoksamdong assemblage and Songgungni assemblage. This thesis examines the relationship between Yeoksamdong assemblage and Songgungni assemblage. In order to answer this question, pit-houses, pottery and stone tools from the settlements of Yeoksamdong assemblage in Central Korea were analyz- ed. Based on the result of analysis, (1) chronology of Yeoksamdong asse- mblage (2) influx and indigenous origin of Songgungni assemblage (3) relationship between Yeoksamdong assemblage and Songgungni assemblage are examined. The results of analysis are as follows: First, based on typological classification, the Yeoksamdong assemblage can be divided into two phases(Ⅰ․Ⅱ). New attributes or types which appeared in the Yeoksamdong Ⅱ phases are similar to those of the Song- gungni assemblage. Second, Radiocarbon date and cultural change in Yeo- ksamdong assemblage suggest that the appearance of Songgungni assemb- lage was related with an influx from outside Korea rather than the indige- nous development. Third, after the appearance of Songgungni assemblage, the cultural change in Yeoksamdong assemblage can be divided into three processes in accordance with spatiality and chronology. 90년대 들어와 충남 지역에서 이루어진 활발한 주거지 발굴을 통해 송국리 유형의 실체를 밝히려는 시도들이 본격적으로 나타났다. 그러나 송국리 유형이 외부로부터 유입되었느냐 기존 문화로부터 발생했느냐의 문제는 아직까지도 논란이 되고 있다. 역삼동 유형과 송국리 유형 간의 관계를 밝히기 위해서는 중부 지역 역삼동 유형의 시간성 특히 하한에 주목해야 할 필요가 있다. 이를 위해 본고에서는 역삼동 유형에 해당하는 중부 지역 주거지 유적들을 대상으로 유물ㆍ유구 분석을 실시하고 편년을 시도하였다. 본고에서 이루어진 분석을 통해 역삼동 유형은 Ⅰ․Ⅱ기로 나눌 수 있었으며 역삼동 유형 Ⅱ기에 나타나는 주거지․토기․석기상의 새로운 속성 또는 형식은 송국리 유형과 밀접한 관련성을 지님을 알 수 있었다. 특히 방사성탄소연대상 역삼동 Ⅱ기의 상한과 하한이 송국리 유형의 상한과 하한과 거의 일치하고 중서 해안 지역의 송국리 유형이 중부 내륙 지역보다 연대가 올라간다는 점, 역삼동 유형의 변화가 중서부 해안 일대를 둘러싸고 가장 빠르고 급격하게 변한다는 점 등은 기원지(origin)를 찾지 못했다는 커다란 맹점에도 불구하고 송국리 유형이 역삼동 유형으로부터 점차 발전하였다기보다는 외부로부터 유입되었을 가능성을 뒷받침해준다. 또한 송국리 유형 등장 이후 역삼동 유형의 전개 과정은 지역에 따라 차이가 있으며 이는 송국리 유형의 최초 등장 지역과 연관이 있음을 알 수 있었다.

        • KCI등재

          실리콘 게이트전극을 갖는 고온소자와 금속 게이트전극을 갖는 P형 저온 다결정 실리콘 박막 트랜지스터의 전기특성 비교 연구

          이진민,Lee,,Jin-Min 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.6

          Poly Si TFTs (poly silicon thin film transistors) with p channel those are annealed HT (high temperature) with gate poly crystalline silicon and LT (low temperature) with metal gate electrode were fabricated on quartz substrate using the analyzed data and compared according to the activated grade silicon thin films and the size of device channel. The electrical characteristics of HT poly-Si TFTs increased those are the on current, electron mobility and decrease threshold voltage by the quality of particles of active thin films annealed at high temperature. But the on/off current ratio reduced by increase of the off current depend on the hot carrier applied to high gate voltage. Even though the size of the particles annealed at low temperature are bigger than HT poly-Si TFTs due to defect in the activated grade poly crystal silicon and the grain boundary, the characteristics of LT poly-Si TFTs were investigated deterioration phenomena those are decrease the electric off current, electron mobility and increase threshold voltage. The results of transconductance show that slope depend on the quality of particles and the amplitude depend on the size of the active silicon particles.

        • KCI등재

          폴리이미드 박막과 스퍼터링 방법으로 증착한 상부금속 그레인이 용량형 습도센서의 전기적 특성에 미치는 영향

          이진민,Lee,,Jin-Min 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.3

          This research, integratable capacitive relative humidity sensor was produced using polyimide on glass substrate. Also, at the time of upper electrode formation, upper electrode grain size was affected by giving changes to sputtering condition. Through this analyzing electrical characteristics affect from capacitive relative humidity sensor was possible. Capacitance of capacitive relative humidity sensor was 330 pF, linearity of 0.6%FS and it showed less than 3% of low hysterisis. Specially, hysterisis was affected more from interface than interstitial. Also was affected by the grain size which is one of the formation condition of upper electrode.

        • KCI등재
        • KCI등재

          현대패션에 나타난 너드시크룩

          이진민,이정호 한국의류학회 2018 한국의류학회지 Vol.42 No.1

          This study examines the socio-cultural background of a Nerd-chic look, establishes a conceptual foundation for Nerd-chic look and examines its aesthetic characteristics in order to understand the latest modern fashion phenomenon. Nerd-chic look is a combination of ‘nerd' as a popular collective style and ‘chic', which refers to the aesthetic value of a costume style. It is a look that is expressed in fashion that reflects the contemporary aesthetic desires based on a nerd's external features and inner values. The aesthetic characteristics of the Nerd-chic look are as follows. First, the Nerd-chic look express the aesthetic characteristic of bricolage that transforms the familiar meaning of an outdated nerd style to ‘chic' image by the rearrangement of the typical nerd style and retro fashion elements. Second, the Nerd-chic look express the aesthetic characteristic of supernormal, as a plain, restrained beauty based on the Normcore fashion mood, disassembly and recombination of ordinary items, fit-free styling, and asexual styling. Third, the Nerd-chic look expresses the aesthetic characteristics of deluxe poor, which rejects stereotypical and expensive luxury and presents a more contemporary and futuristic spirituality. It is expressed in oversized shapes that are not intended to fit the body and show incompatibility between fashion items or way of dressing.

        • KCI등재

          고온에서 제조된 실리콘 주입 p채널 다결정 실리콘 박막 트랜지스터의 전기 특성 변화 연구

          이진민,Lee,,Jin-Min 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.5

          Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.

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