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KHUSAT-03 (SIGMA)의 개발 및 환경시험 결과
이성환(Seongwhan Lee),이정규(Jung-Kyu Lee),이효정(Hyojeong Lee),이정호(Jeongho Lee),신재혁(Jehuyck Shin),정선영(Seonyoung Jeong),진호(Ho Jin),남욱원(Uk-Won Nam),김효민(Hyomin Kim),Regina Lee,Marc R. Lessard 한국항공우주학회 2016 한국항공우주학회 학술발표회 논문집 Vol.2016 No.4
경희대학교는 과학임무를 위해 Tissue Equivalent Proportional Counter (TEPC)와 fluxgate MAGnetometer (MAG)를 탑재한 초소형인공위성 Scientific cubesat with Instruments for Global magnetic field and rAidation (SIGMA)를 개발하였다. SIGMA는 3U 크기로 개발된 2.9 ㎏의 무게를 갖는 큐브위성이다. 주탑재체인 TEPC는 Linear Energy Transfer (LET) 스펙트럼을 측정하고 우주환경에서의 등가선량을 도출한다. 부탑재체인 MAG는 큐브위성에 적합하도록 소형화하여 설계하였으며 0.1 nT의 분해능과 ±52000 nT의 측정범위를 갖는다. 현재 SIGMA는 비행모델 개발 및 우주환경시험과 지상국 개발을 완료하여 발사를 위한 모든 준비를 마쳤다. 본 논문에서는 SIGMA의 시스템 개발과 우주환경시험 결과에 대하여 논의하고자 한다. Kyung Hee University (KHU) has been develop a CubeSat for the space science mission called Scientific cubesat with Instrument for Global Magnetic field and rAdiation (SIGMA), which installed Tissue Equivalent Proportional Counter (TEPC) and a magnetometer. SIGMA has a 3U CubeSat, and the weight is about 2.9 ㎏. The primary payload, TEPC, measure the Linear Energy Transfer (LET) spectrum and calculate the equivalent dose for the complicated radiation field in the space. The secondary payload, magnetometer, measures the global magnetic fields. It has 0.1 nT resolution in the dynamic range of ±52000 nT. In this paper, we introduce the system design and the environment test of the SIGMA CubeSat mission.
High-Performance Architecture of Transform Circuit for Multi-standard Video CODEC
Seonyoung Lee,Kyeongsoon Cho 대한전자공학회 2008 ITC-CSCC :International Technical Conference on Ci Vol.2008 No.7
This paper presents the architecture of transform circuit that can support multiple video CODEC standards such as JPEG, MPEG-1/2/4, H.264 and VC-1. The proposed architecture exploits the similarity of 4-point and 8-point DCT’s based on the permutation matrices. Since our circuit accepts the transform coefficients from the users, it can be extended very easily to cover any kind of DCTbased transforms for future standards. We described the proposed transform circuit at RTL and verified its operation on FPGA board.
An Area-Efficient Integrated Architecture of Transform Circuit for WMV9/MPEG-4/H.264 Video Decoder
Seonyoung Lee,Kyeongsoon Cho 대한전자공학회 2007 ITC-CSCC :International Technical Conference on Ci Vol.2007 No.7
This paper proposes the new circuit architecture to integrate the IDCT operations of three most popular video compression standards: WMV9, MPEG-4 and H.264. The core of the proposed architecture is the concept of the delta coefficient matrix which exploits the similarities of the IDCT coefficients of WMV9, MPEG-4 and H.264. We implemented the integrated IDCT circuit based on this architecture using only adders and shifters, verified its operation on the FPGA board and synthesized the gate-level circuit using 130㎚ standard cell library. The synthesized circuit has 45,814 logic gates and its maximum operating frequency is 123.1㎒.
Design of a low-power real-time wavelet CODEC circuit
Seonyoung Lee,조경순 한국물리학회 2005 Current Applied Physics Vol.5 No.4
This paper presents the architecture and design of a CODEC circuit that can compress and reconstruct 4:2:2 color VGA videoimages using two-dimensional DWT. For real-time operation and low-power consumption, we modied the traditional Mallat’ssub-band coding method to reduce the amount of computation required in two-dimensional DWT. Using the modied method,two-dimensional DWT can be performed by two sets of one-dimensional DWT operations regardless of the number of decom-position levels. We adopted the systolic array architecture to design the circuit implementing our method. Our low-power real-timeCODEC circuit was designed using Verilog HDL and fabricated as a VLSI chip using 0.35l m 3.3 V CMOS standard cell process.We made a simple DVR system using our CODEC chip to store and retrieve the video image data to and from the hard disk, andobserved successful real-time operations..