심한 골병변으로 발현된 기능성 낭종성 부갑상선 선종

전숙,김영희,박지영,고관표,박철영,김덕윤,우정택,김성운,김진우,김영설,고석환 대한내분비학회 2003 Endocrinology and metabolism Vol.18 No.2

낭종성 부갑상선 선종과 심한 골병변을 동반한 부갑상선 기능항진증은 매우 드문 질환으로서, 저자들은 양측 고관절의 통증을 초기 주소로 내원한 환자에서 고칼슘혈증과 부갑상선 호르몬 증가, 골병변의 방사선적 소견을 통해 부갑상선 기능항진증을 진단하고, 경부 초음파와 컴퓨터 단층 촬영, 부갑상선 스캔검사 및 수술중 부갑상선 낭종액 검사 등을 통해 기능성 부갑상선 낭종의 한 종류인 낭종성 부갑상선 선종을 진단하고 수술적 제거를 통하여 정상화된 1예를 경험하였다. A cystic parathyroid adenoma is rare. A case of primary hyperparathyroidism, with the cystic formation of a parathyroid adenoma and a severe bony lesion, is reported. A 52-year-old male was admitted due to pain in both hips and for evaluation of hypercalcemia. The plasma level of the intact parathyroid hormone (iPTH) was elevated to 1424 pg/mL. Ultrasonography and the computed tomography revealed a parathyroid cyst on the left thyroid lower pole. Parathyroid scintigraphy detected a parathyroid adenoma. A radiograph showed a subperiosteal bone resorption on the phalanges, and a brown tumor (osteitis fibrosa cystica) on the femur shaft was noted. A surgical excision of the parathyroid adenoma was performed. The PTH level in the cystic fluid was increased. A histological examination confirmed a cystic parathyroid adenoma. The PTH level was normalized after the operation (J Kor SOC Endocrinol 18:214-220, 2003).

癩患者 血淸內의 adenosine deaminase에 關한 硏究

全準烈,金允燮,田寅淇,金永杓 大韓癩學會 1981 癩學 會誌 Vol.14 No.1

다중처리를 위한 상호접속망의 성능 분석에 관한 연구

김영천,최진규 전북대학교 전자산업개발연구소 1991 전자산업연구 Vol.2 No.-

The interconnection network is an integral part of multiprocessing system. The multistage interconnection network(MINs) have been the objects of intense research in recent years. In this paper, the performance of circuit swiching MINs is investigated with new conflict resolution strategies. The timeout(t) control resolution model, proposed by this paper, includes drop and hold strategies, and it is shown that the results of performance evaluation for circuit switching generalized cube networks are analysed by timeout(t) strategy. The results of performance evaluation of partitioned MINs indicate that "input partitioning" coupled with the used of the "large t for timeout(t)" strategy produces the best network operation in terms of RST(Requst Service Time).

통신 플로토콜의 적합성 검증에 관한 연구

김기영,기장근,김영천 전북대학교 전자산업개발연구소 1990 전자산업연구 Vol.1 No.-

The purpose of this paper is to verify if a protocol implementation conforms to its specification, CCITT No. 7 SCCP. Protocol implementation have to be tested in a manner reflecting most closely a normal operating environment. This implies that the protocol entity must be tested as "black box". Communication protocol can be modeled by a finite state machine with is 1) completely specified, 2) minimal, and 3) strongly connected. This paper is focused on the methods for generating test sequences for communication protocol, considering in particular their effective-ness in detecting possible errors, and their effieciency measured by the length of the test sequence.

잣나무 苗木의 養苗法 改善에 關한 硏究 Ⅲ : 播種時期이 差에 따른 잣나무 幼苗의 生長 比較 Effects of seeding time on the growth of young seedling

金英彩,金尙根 慶熙大學校 1984 論文集 Vol.13 No.-

After hastening seed germination by means of open ground storage during the period from the fall to next year spring, the growthes of seedlings seeded at different days were compared. The results obtained were summarized as follows: 1. The effects of seeding time on the length, diameter and weight growth of seedlings were irregular. However, each of the maximum growthes appeared on the 26th and 30th of March. Comparatively, the early seeding, the last ten days of March, was favorable for young seedling growth. 2. The contribution rates to the length, diameter, and weight growth by seeding time was 32.9%, 8.8% and 60.9%. The weight growth of seedlings was especially effected by seeding time.

잣나무 苗木의 養苗法 改善에 關한 硏究 Ⅰ : 春期播種苗와 秋期播種苗에 對한 生長比較 Effects of sowing season on the length, diameter and weight growth

金英彩,金尙根 慶熙大學校 1984 論文集 Vol.13 No.-

In order to investigate the influence of sowing season (spring and fall seeding) on the length, diameter and weight growth, the growthes of the seedlings were measured at the end of one growing season. Results are follows: 1. Fall seeding produces longer seedlings than spring seeding seedlings in length growth. 2. Spring seeding seedlings are larger than fall seeding seedlings in the increment of diameter. 3. Seedlings seeded on spring are heavier than fall seeding seedlings in the fresh and dry weight growth of stem and branch, needle, and root.

DSM-CC U-U 적합성 시험을 위한 시험열 생성

김영규,전기환,박용,백청호,최형진 강원대학교 정보통신연구소 2006 정보통신논문지 Vol.10 No.-

In these days, as rapid growth of multimedia industries and development of techniques, an effort to develop DAVIC(Digital Audio-Visual Council) systems which support multimedia services such as VOD(Video on Demand) and teleshopping is being done. Therefore it will be indispensable to establish a new conformance testing method related DAVIC system with respect to their standard specification. DSM-CC is a core part of DAVIC and adopts DSM-CC U-N for S3 information stream which plays a part in connection establishment and release of session and transmission layer, and DSM-CC U-U for S2 which operates user application of the system. In this paper, we propose a new conformance testing architecture and methodology based on scenario in order to test DSM-CC U-U which doesn't have any message sequences.

HiPi 버스를 사용한 멀티프로세서 시스템에서 캐쉬 코히어런스 프로토콜의 성능평가에 관한 연구

金永川 全北大學校 1992 論文集 Vol.34 No.-

본 논문에는 pended 프로토콜을 가지는 HiPi 버스와 다중 캐쉬 메모리를 사용하는 멀티프로세서 시스템을 기술하고, 캐쉬 코히어런스 프로토콜에 따른 프로세서 효율면에서 시스템의 성능을 평가하였다. HiPi 버스는 ETRI에서 개발된 행망용 주전산기인 TICOM Ⅱ의 공유버스로 사용되기 위하여 개발되었다. HiPi 버스의 문제점 중 하나는 캐쉬 간의 전송을 허용하지 못하는 것이다. 이러한 문제점을 해결하기 위하여 캐쉬 간의 전송을 지원하도록 수정된 버스를 제안하였다. 또한 HiPi 버스를 갖는 시스템 각각의 성능을 여러 가지 캐쉬 코히어런스 프로토콜을 적용하여 분석 비교하였다. 고려된 캐쉬 코히어런스 프로토콜은 Write-Through, write-Once, Berkely, Synapse, Illinois, Firefly, Dragon이다. 캐쉬 코ㅇ히어런스 프로토콜을 분석하기 위하여 각각을 상태 천이도로 나타내었으며, 상태의 확률을 구하기 위하여 Markov 정적 상태도를 이용하였다. 각 상태의 확률은 시뮬레이션에서 입력 값으로 사용하였고, 모델링과 시뮬레이션은 SLAM Ⅱ 심볼과 언어를 사용하였다. In this paper, we describe a multiprocessor system using the HiPi bus with pended protocol and multiple cache memories, and evalute the performance of the system in terms of processor utilization for cache coherence protocols. The HiPi bus in delveloped as the shard bus of TICOM Ⅱ which is main computer system to establish a nation -wide computing netwirk in ETRI. One of the problems with the HiPi bus is that it dose not allow cache-to-cache transfer. In order to solve this problem, we propose the modofied HiPi bus which supports cache-to cache transfer. In addition, each performance of the system with HiPi bus and the modified HiPi bus are analyzed and compared applying various cache coherence protocol : Write -Through, Write- Once, Berkely, Synapse, Illinois, Firefly, and Dragon. Each of cache coherence protocol is descrided by the state diagram to analyze them, and the probaility of states is calculated by Markov steady state. The calculated probaility of state is used for input parameters of simulation, and Modeling and simulation are implemented and performed using SLAMⅡ.

Fault Tolerant System에서의 에러 검출기 설계

김현주,최진규,김현욱,김영천 明知大學校 産業技術硏究所 1991 産業技術硏究所論文集 Vol.10 No.-

It is important to detect and correct errors in the modern digital system. In this paper, we have designed error detector and corrector in the fault tolerant system. Error detector/corrector consists of data latch, syndrome generator, parity generator, parity checker, syndrome and error detection part and error correction part. In addition, error detectro/corrector have a latch over the data and check bit in order to synchronize system. The operation of error detector/corrector has been checked through the logic simulation.

다중프로세서의 구성을 위한 버스구조 비교 분석에 관한 연구

김영천,황승욱,김현욱 明知大學校 産業技術硏究所 1985 産業技術硏究所論文集 Vol.4 No.-

Computer system designers and system integrators producing leading edge equipment in the future will often opt powerfull microprocessors, or microprocessor based boards and systems. They must hook these chips and boards together with a flexible bus if they wants take a full advantage of system functionality. To help make an intelligent decision as to which bus to choose for a computer system's lifetime, designers should be cognizant of major and minor differences between the buses. Today, there are two major open buse choices-Multibus Ⅱ and VME bus. In addition, there is a 32bit bus standard from the IEEE. So, in this paper we analyse and compare the characteristics of buses-VME bus, multibus Ⅱ and P.896 bus.