연속슬래브교량의 고유진동해석에 대한 수치모형

박제선,심도식,이정호,정경일 江原大學校 産業技術硏究所 1997 産業技術硏究 Vol.17 No.-

The problem of deteriorated highway concrete slab is very serious all over the world. Before making any decision on repair work, reliable non-destructive evaluation is necessary. One of the dependable methods is to evaluate the in-situ stiffness of the slab by means of obtaining the natural frequency. By comparing the in-situ stiffness with the one obtained at the design stage, the degree of damage can be estimated rather accurately. In this paper, the numerical modeling of vibration analysis to three span continuous reinforced concrete bridge with elastic intermediate support is presented.

자궁외임신 216례

남상욱,송재경,최종호,홍순도,이종학,허광현,박일영 啓明大學校 醫科大學 1993 계명의대학술지 Vol.12 No.3

This study was undertaken to review the case series of 216 ectopic pregnancies admitted to the Department of Obstetrics and Gynecology, Pohang Sunrin Hospital from January, 1990 to December, 1991. The incidence of ectopic pregnancy was relatively high, being found to be 1 in 34.4 delivery cases. On the symptomatology, low abdominal pain was encountered in 96.8 percent, amenorrhea in 93.5 percent and vaginal bleeding in 16.2 percent in order. The fallopian tube was the most frequently, being found to be 98.6 percent, followed by the ovary with 0.9 percent and the cervix with 0.5 percent.

함암요법으로 골수기능이 억제된 악성종양환자에서 rhG-CSF의 임상적 효과

김원민,서영환,조경상,유병전,김상도,이승일,정춘해 朝鮮大學校 附設 醫學硏究所 1992 The Medical Journal of Chosun University Vol.17 No.2

We have studied the efficacy of rhG-CSF in patients with non-hodgkin's lymphoma, acute leukemia, and small cell lung cancer undergoing anticancer chemotherapy. These patients were below leukocyte count 3,000 cubic millimeter due to myelosuppression induced by the first cycle of intensive chemotherapy. Treatment with rhG-CSF (100㎍ per square meter of body surface area per day in a 30-minute intravenous infusion) was begun two days and for 14 consecutive days after the end of the second cycle of chemotherapy. The results were as follows. 1. The onset of myelosuppression was 6 days after chemotherapy, and the onset of recovery was 16.7 days after chemotherapy, and the duration of granulocytopenia was 10.7 days in patients with malignant tumor during contrast period. 2. The duration of granulocytopenia was shortened 5.2 days in patients administered rhG-CSF than without rhG-CSF, and we observed the shortest duration of granulocytopenia with increasing granulocyte in patients with small cell lung cancer. 3. Observing the differential count of leukocyte checked the highest level of leukocyte in contrast and rhG-CSF period, the persentage of neutrophil was increased in patients with acute leukemia and small cell lung cancer during rhG-CSF period, but not increased in patients with non-hodgkin's lymphoma. 4. rhG-CSF was not influenced on liver faction, renal fuction, uric acid, and glucose metabolism, also had no effect on recovery of platelet. In conclusion, rhG-CSF can be administered to patients with hematologic or nonhematologic malignant tumor that myelosuppression induced by anticancer chemotherapy result in shortening the duration of granulocytopenia and increasing the peripheral neutrophil, therefore full dose chemotherapy can be administered on time, and rhG-CSF may reduce the morbidity and mortality of patients with malignant tumor undergoing chemotherapy.

고유량 고효율 혈액투석막 재사용의 임상경험

조현경,김승정,임병국,정혁준,최영일,마경애,신규태,김흥수,김도헌 대한신장학회 2001 대한신장학회잡지 Vol.20 No.3

열공형과 비열공형 피질하 혈관성 치매에서 위험인자의 차이에 관한 비교 연구

배희준,정지향,유경호,나덕렬,김상윤,최경규,양동원,손의주,이상도,김재우,박경원,김응규,이재홍,박미영,한일우,함동석,최문성,하충건,최성혜,이애영,이병철,한설희 대한치매학회 2003 Dementia and Neurocognitive Disorders Vol.2 No.2

Backgrounds and Objectives: Vascular dementia is a group of dementing disoders arising from various stroke syndrome. Among these. subcortical ischemic vascular dementia (SIVD) is regarded as a relatively distinct clinical entity. However, MRI patterns of SIVD are not homogenous. In some patients, lacunes are dominant, and in others, subcortical white matter changes are. This study was designed to compare risk factor profiles between SIVD with and without multiple lacunes. Methods: We divided 47 subjects (22 males, mean age. 68 years) recruited from VADAPET (Multicenter Trial For Evaluation Of The Changes In the PET Images Of Subcortical Vascular Dementia Patient) study into two groups one with more than 5 lacunes in deep gray matter (lacune group) and the other with 5 or less(non-lacune group) Clinical characteristics and laboratory findings of two groups were compared. Results: Nineteen of 47 patients (40%) belonged to the lacune group. The lacune and non-lacune groups d d not differ in the following variables: age, hypertension, diabetes mellitus, hyperlipidemia heart disease, history of stroke or TIA, history of trauma or major surgery, family history of hypertension stroke, or dementia, age at diagnosis of dementia, body mass index, white blood cell count, ESR, CRP, fibrinogen, hemoglobin A1C, total cholesterol. LDL cholesterol creatinine, proteinuria, glucosuria, and microhematuria. However, male sex, smoking alcohol. hemoglobin, and HDL cholesterol were possibly associated more with lacune group SIVD than with non-lacune group (p<0 1) Multivariate analyses revealed that smoking, hemoglobin, and HDL cholesterol were independent predictors of SIVD with multiple lacunes Conclusion: Our study suggests that SIVD with multiple lacunes may be significantly different in smoking habits hemoglobin, and HDL cholesterol from SIVD without multiple lacunes.

SCR-based ESD protection circuit with low trigger voltage and high robustness

Kyoung-il Do,Min-Ju Kwon,Bo-Bae-Song,Byung-Seok Lee,Yong-Seo Koo 대한전자공학회 2017 대한전자공학회 학술대회 Vol.2017 No.1

LIGBT-based ESD Protection Device with High Holding Voltage for 15 V Power IC Applications

Kyoung-Il Do,Byeong-Suk Lee,구용서 대한전자공학회 2019 Journal of semiconductor technology and science Vol.19 No.5

In this study, a lateral insulated-gate bipolar transistor (LIGBT)-based device for electrostatic discharge (ESD) protection of 15 V power IC applications is proposed. This new ESD surge protection device has a floating N+ region inserted into the N-well of the conventional LIGBT structure, allowing for low trigger voltages, high holding voltages, high ESD robustness, and high latch-up immunity. The influence of the length of the N+ floating region on the electrical performance of the LIGBT-based protection device was characterized and optimized using transmission line pulsing (TLP) and transient induced latch-up (TLU) tests. A LIGBT-based protection device with a trigger voltage of 20.2 V and a holding voltage of 16.2 V was fabricated. Electrostatic discharge tests using the human body model (HBM) and the machine model (MM) show that the new device exceeds existing commercial ESD sensitivity standards. Moreover, the LIGBT device passed reliability testing over the temperature range of 300K to 500K. Therefore, the proposed LIGBT-based ESD protection device has a high holding voltage and high latch-up immunity suitable for 15 V power IC applications.

All-directional Electrostatic-discharge Protection Circuit with High Area-efficiency

Kyoung-Il Do,Byung-Seok Lee,Seung-Hoo Jin,Yong-Seo Koo 대한전자공학회 2021 Journal of semiconductor technology and science Vol.21 No.4

This paper proposes a design for a wholechip all-directional electrostatic-discharge (ESD) protection circuit using a resistor-capacitor (RC) lateral insulated-gate bipolar transistor (LIGBT)-based 12 V power clamp and a silicon-controlled rectifier (SCR)-based 12 V input/output (I/O) clamp. The RC LIGBT-based power clamp detects pulses through an ESD detection circuit and applies a bias to the gate. Therefore, the proposed power clamp does not have snapback curve and has a low impedance during an ESD event. In addition, the structural characteristics of the proposed I/O clamp enable it to provide discharge paths for all four ESD discharge modes (PS, PD, NS, ND), and the clamp is more area efficient than conventional ESD protection circuits composed of gate-grounded n-type metal-oxide-silicon transistors or SCRs. Moreover, because floating regions are inserted in the I/O clamp and the clamp has a high holding voltage, the clamp design is resistant to latch-up, which is a critical drawback of snapback devices. Therefore, the proposed ESD protection circuit can effectively provide highly reliable protection to internal integrated circuits. The proposed circuit was fabricated using a 0.18 ㎛ bipolar-CMOS-DMOS process, and the electrical properties and ESD robustness of the circuit were verified through a transmission line pulse measurement method and human body model surge application tests.

Silicon-controlled Rectifier-based Electrostatic Discharge Protection Circuit with Additional NPN Parasitic Bipolar Junction Transistor for 5-V Application

Kyoung-Il Do,Yong-Seo Koo 대한전자공학회 2021 Journal of semiconductor technology and science Vol.21 No.2

This paper proposes a novel protection circuit based on a silicon-controlled rectifier (SCR) to prevent electrostatic discharge (ESD) at low voltages. The proposed device consists of an additional NPN parasitic bipolar transistor operated via application of an N+ diffusion region and a well breakdown voltage, to reduce the high trigger voltage caused by the well breakdown voltage of the existing SCR structure. Furthermore, the proposed device exhibits an improved trigger voltage, holding voltage, and dynamic resistance component when compared with existing parasitic PNP bipolar transistors. The proposed ESD protection circuit was manufactured using a 0.18 μm bipolar-CMOS-DMOS; it exhibited a significant improvement in electrical characteristics such as trigger voltage (8.1 V) and holding voltage (3.55 V), according to the results of transmission line pulse measurement. Hence, it is deemed to be suitable for 5-V-class applications.

A Design of Whole-chip ESD Protection Circuit with SCR-based I/O and LIGBT-based Power Clamp

Kyoung-Il Do,Yong-Seo Koo 대한전자공학회 2021 Journal of semiconductor technology and science Vol.21 No.1

This study proposed and fabricated an all-directional whole-chip electrostatic discharge (ESD) protection circuit design, including input/output (I/O) and power clamps. The proposed I/O ESD clamp is based on silicon controlled rectifiers (SCR) and possesses improved snapback and bidirectional characteristics owing to the insertion of an improved floating region. The proposed ESD power clamp has an excellent clamping ability and a high holding voltage owing to the use of a lateral insulated gate bipolar transistor (LIGBT). The ESD protection circuit is fabricated using a 0.18 ㎛ bipolar-CMOSDMOS (BCD) process and is properly placed in the ESD clamp position. Consequently, the proposed ESD protection circuit contributes toward improving the area efficiency and reliability of the integrated circuit. The electrical properties and robustness were analyzed using a transmission line pulse (TLP) system and an ESD pulse generator. According to the measurements, the proposed whole-chip ESD protection circuit is robust enough to discharge 8 ㎸ HBM and 800 V MM in four ESD stress modes for the input and output units (PD: positive -VDD, ND: negative -VDD, PS: positive -VSS, and NS: negative -VSS) as well as in the DS (VDD to VSS) mode between VDD and VSS.