1100 ${\AA}$의 베이스 폭을 갖는 다결정 실리콘 자기정렬 트랜지스터 특성 연구

구용서,안철,Koo, Yong-Seo,An, Chul The Institute of Electronics and Information Engin 1993 전자공학회논문지-A Vol.30 No.10

This paper describes the fabrication process and electrical characteristics of PSA (Polysilicon Self-Align) bipolar transistors with a thin base width of 1100.angs.. To realize this shallow junction depth, one-step rapid thermal annealing(RTA) technology has been applied instead of conventional furnace annealing process. It has been shown that the series resistances and parasitic capacitances are significantly reduced in the device with emitter area of 1${\times}4{\mu}m^{2}$. The switching speed of 2.4ns/gate was obtained by measuring the minimum propagation delay time in the I$^{2}$L ring oscillator with 31 stages.

ICA 원조와 한국경제

구용서 대한지방행정공제회 1957 地方行政 Vol.6 No.8

뇌졸중의 발생 및 다양한 임상양상의 일주기성 변화

구용서,유성욱,정기영,조경희 대한수면연구학회 2014 Journal of sleep medicine Vol.11 No.2

Objectives: This study was performed in order to delineate whether the onset of symptom onset follows circadian rhythm and to identify potential clinical characteristics with similar circadian distribution as that of symptom onset time in stroke patients. Methods: We retrospectively analyzed the data of subjects who were registered in a prospectively collected stroke registry in Korea University Medical Center Anam Hospital from September 2007 to December 2013. A Cosinor analysis was used to examine the circadian variation of the symptom onset of stroke as well as various clinical parameters. Results: A total of 2,047 patients with stroke were analyzed in our study. The Cosinor analysis showed significant circadian rhythm of stroke occurrence existed according to the symptom onset time of stroke (p<0.001) and the peak time for stroke occurrence was 12:22 (95% confidence interval 11:29–17:41). Cosinor analyses of other variables also showed significant circadian variation of age, fasting glucose, high-density lipoprotein (HDL), and lowdensity lipoprotein. The circadian distribution of low HDL was similar to that of stroke occurrence. Conclusions: The prevalence of stroke occurrence and low level of HDL peaked during the morning. J Korean Sleep Res Soc 2014;11(2):6

트렌치 게이트형 DMOS 스위치를 사용한 DC-DC 변환기 설계

구용서 서경대학교 산업기술연구소 2008 産業技術硏究所論文集 Vol.20 No.-

In this paper, the high efficiency dc-dc converter with novel switching device is presented. In general, the conduction loss of the pass transistor is very important concern for the design of dc-dc convertor. The pass transistors should have been designed with a very large size to reduce a conduction loss. Alternatively, the TDMOS could be used as a switch device to reduce the area and the conduction loss of the pass transistor simultaneously. So, the high efficient dc-dc converter with the modified novel TDMOS is proposed. The dc-dc converter is controlled with PWM control circuits that consists of a band-gap reference circuit, an error amplifier, a comparator, a saw-tooth generator and a feed-back circuit. In the result, the proposed dc-dc converter with the TDMOS switching device, based on the PWM control circuits, has the high efficiency of 94% at 450mA output current.

고성능 BiCMOS의 전기적 특성에 관한 연구

구용서 서경대학교 1994 論文集 Vol.22 No.2

이중 매몰층, 1.5㎛ 에피두께, 이중 well, LOCOS 소자격리, LDD MOS 소자와 이중 다결정실리콘 전극을 갖는 바이폴라 소자에 의하여 구성된 BiCMOS 소자를 설계, 제작하였다. 제작된 소자를 측정 및 분석한 결과, 31단 CML 바이폴라(A_E=2×8μ㎡)링 발진기와 31단 CMOS(A_E=1.25×5μ㎡) 인버터 링 발진기로부터 94㎰/5V와 330㎰/12V의 게이트 전달지연시간/소자 강복전압을 갖는 바이폴라 및 MOS 소자특성을 얻을 수 있었다. 또한 BiCMOS 소자의 경우, 31단 BiCMOS 링 발진기로부터 약 700㎰의 게이트 전달 지연시간을 얻었으며, 출력부하의 증가에 따른 속도의 감속비가 완만한 전기적 특성을 얻을 수 있었다.

Reduced Frontal P3a Amplitude in Migraine Patients during the Pain-Free Period

구용서,권도영,이관택,오경미,김명선,김경환,임창환,정기영 대한신경과학회 2013 Journal of Clinical Neurology Vol.9 No.1

Background and Purpose Neuropsychological and neuroimaging studies both suggest that frontal lobe dysfunction is present in migraineurs. Since P3a abnormalities manifest in other diseases associated with attention problems, such as attention deficit hyperactivity disorder, we hypothesized that migraine patients have P3a abnormalities, particularly in the frontal region. Methods Event-related potentials were measured using a passive auditory oddball paradigm in 16 female migraineurs (aged 22.9±2.0 years, mean±SD) during the interictal period and in 16 age-matched healthy females (22.6±2.0 years). The amplitudes and latencies were analyzed independently using repeated-measures analysis of variance. Nonparametric statistical testing using a cluster-level randomization method was performed to localize the abnormalities. Results The mean P3a amplitude at frontal areas during the third trials was significantly lower in migraineurs (1.06 μV) than in controls (1.69 μV, p=0.026). P3a amplitudes were negatively correlated with the duration of the migraine history (r=-0.618, p=0.014). Cluster-based nonparametric statistical analysis showed that the amplitudes over left frontal areas were significantly lower in migraine patients than in controls. Conclusions A reduced P3a amplitude of migraineurs reflects attentional deficits and frontal dysfunction. The negative correlation between P3a amplitude and the duration of the migraine history suggests that attentional deficits and frontal dysfunction are either the cause or the result of headache. J Clin Neurol 2013;9:43-50

향상된 전기적 특성을 갖는 트렌치 게이트형 절연 게이트 바이폴라 트랜지스터에 관한 연구

구용서,손정만,Koo, Yong-Seo,Son, Jung-Man 한국전기전자학회 2007 전기전자학회논문지 Vol.11 No.4

본 논문에서는 전력용 스위칭 소자로 널리 활용되고 있는 IGBT 소자 중 수평 게이트 구조보다 우수한 특성을 지닌 트렌치 게이트 IGBT(TIGBT) 구조를 채택하여, 기존의 TIGBT가 갖는 구조적 한계를 극복하고 좀 더 우수한 전기적 특성을 갖는 새로운 구조의 수직형 TIGBT를 제안하였다. 첫 번째로 제안한 IGBT 소자는 P+컬렉터를 산화막으로 고립시킴으로서 N-드리프트 층으로의 정공 주입효율을 극대화하여 기존 구조보다 더 낮은 순방향 전압강하를 얻도록 설계된 구조이다. 두 번째 제안한 구조는 양 게이트 사이의 P-베이스 구조를 볼록하게 형성함으로서 게이트 쪽으로 집중되는 전계의 일부를 접합부 쪽으로 유도하여 기존 구조보다 더 높은 항복전압을 얻을 수 있다. 또한 P-베이스의 볼록한 구조가 턴-오프 시 정공의 흐름을 개선시켜 기존 구조보다 더 빠른 턴-오프 시간을 갖게 된다. 시뮬레이션 결과 첫 번째 구조의 특징은 2.4V의 순방향 전압강하 특성을 갖는 기존의 IGBT 구조보다 상당히 낮은 2.1V의 순방향 전압강하 특성을 나타냈으며, 두 번째 구조는 기존의 IGBT 보다 10V정도 높아진 항복전압 특성을 보였다. 또한 두 번째 구조에서 기존 구조와 비교해볼 때 9ns 정도 빠른 턴-오프 시간을 보였다. 최종적으로 제안된 새로운 구조의 TIGBT는 위 두 구조가 갖는 우수한 전기적 특성을 모두 갖도록 결합한 것이며, 시뮬레이션 결과 기본의 TIGBT 소자보다 순방향 전압강하, 항복특성, 그리고 턴 오프 특성이 모두 우수한 결과를 나타냈다. In this study, three types of a novel Trench IGBTs(Insulated Gate Bipolar Transistor) are proposed. The first structure has P-collector which is isolated by $SiO_2$ layer to enhance anode-injection-efficiency and enable the device to have a low on-state voltage drop(Von). And the second structure has convex P-base region between both gates. This structure may be effective to distributes electric-field crowded to gate edge. So this structure can have higher breakdown voltage(BV) than conventional trench-type IGBT(TIGBT). The process and device simulation results show improved on-state, breakdown and switching characteristics in each structure. The first one was presented lower on state voltage drop(2.1V) than that of conventional one(2.4V). Also, second structurehas higher breakdown voltage(1220V) and faster turn off time(9ns) than that of conventional structure. Finally, the last one of the proposed structure has combined the two structure (the first one and second one). This structure has superior electric characteristics than conventional structure about forward voltage drop and blocking capability, turnoff characteristics.

Power IC용 ESD 보호회로 설계기술

구용서 대한전자공학회 2010 전자공학회지 Vol.37 No.8

다결정 실리콘 Self-align을 이용한 고성능 바이폴라 트랜지스터 제작 ( High Performance Bipolar Transistor with Self-Aligned Polysilicon )

구용서,구진근,박문평,이진효 대한전자공학회 1985 대한전자공학회 학술대회 Vol.1985 No.1

CCD 이미지 센서용 Power Management IC 설계

구용서,이강윤,하재환,양일석,Koo, Yong-Seo,Lee, Kang-Yoon,Ha, Jae-Hwan,Yang, Yil-Suk 한국전기전자학회 2009 전기전자학회논문지 Vol.13 No.4

본 논문에서는 CCD 이미지 센서용 PMIC를 제안한다. CCD 이미지 센서는 온도에 민감하다. 일반적으로 낮은 효율을 갖는 PMIC에 의해 열이 발생된다. 발생된 열은 CCD 이미지 센서의 성능에 영향을 미치므로 높은 효율을 갖는 PMIC를 사용함으로써 최소화 시켜야 한다. 고효율의 PMIC개발을 위해 입력단은 동기식 step down DC-DC컨버터로 설계하였다. 제안한 PMIC의 입력범위는 5V~15V이고 PWM 제어방식을 사용하였다. PWM 제어회로는 삼각파 발생기, 밴드갭 기준 전압회로, 오차 증폭기, 비교기로 구성된다. 삼각파 발생기는 1.2MHz의 발진 주파수를 가지며, 비교기는 2단 연산 증폭기로 설계되었다. 오차 증폭기는 40dB의 DC gain과 $77^{\circ}$ 위상 여유를 갖도록 설계하였다. step down DC-DC 컨버터의 출력은 Charge pump의 입력으로 연결된다. Charge pump의 출력은 PMIC의 출력단인 LDO의 입력으로 연결된다. PWM 제어회로와 Charge pump 그리고 LDO로 구성된 PMIC는 15V, -7.5V, 5V, 3.3V의 출력전압을 갖는다. 제안한 PMIC는 0.35um 공정으로 설계하였다. The power management integrated circuit(PMIC) for CCD image sensor is presented in this study. A CCD image sensor is very sensitive against temperature. The temperature, that is heat, is generally generated by the PMIC with low efficiency. Since the generated heat influences performance of CCD image sensor, it should be minimized by using a PMIC which has a high efficiency. In order to develop the PMIC with high efficiency, the input stage is designed with synchronous type step down DC-DC converter. The operating range of the converter is from 5V to 15V and the converter is controlled using PWM method. The PWM control circuit consists of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit. The saw-tooth generator is designed with 1.2MHz oscillation frequency. The comparator is designed with the two stages OP Amp. And the error amplifier has 40dB DC gain and $77^{\circ}$ phase margin. The output of the step down converter is connected to input stage of the charge pump. The output of the charge pump is connected to input of the LDO which is the output stage of the PMIC. Finally, the PMIC, based on the PWM control circuit and the charge pump and the LDO, has output voltage of 15V, -7.5V, 3.3V and 5V. The PMIC is designed with a 0.35um process.