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RF Magnetron Sputtering법으로 증착된 ZnNiO박막의 특성
오형택,이태경,김동우,박용주,박일우,김은규 한국진공학회 2003 Applied Science and Convergence Technology Vol.12 No.4
The electrical, optical and structural properties of ZnNiO thin _ films deposited on Si substrates using rf-magnetron sputtering method have been investigated before and after the thermal annealing processes. The crystallinity of the ZnNiO thin film become degraded with increasing the Ni contents. This is mainly because the lattice of the thin film was expanded due to the oxygen-deficient conditions. Concerning the electrical properties of the thin film, the carrier concentration increases ($6.81\times10^{14}\textrm{cm}^{-2}$) and Hall mobility decreases (36.3 $\textrm{cm}^2$/Vㆍs) with higher doping concentration of Ni. However, the carrier concentration and Hall mobility became low ($1.10\times10^{14}\textrm{cm}^2$ and high (209.6 $\textrm{cm}^2$/Vㆍs), respectively, after the thermal annealing process at $1000 ^{\circ}C$. We also observed a strong luminescene center peaking at 546 nm in photoluminescence spectra, which was caused by a deep level center in the ZnO band gap with oxygen deficient ZnNiO structure.
최석호,오형택,박준우,이호선,박용석,김한기,신동희 한국물리학회 2010 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.56 No.4
We firstly report a strong enhancement of the photoluminescence (PL) from hybrid structures of indium zinc oxide (IZO)/Ag/IZO fabricated on glass substrates by DC magnetron sputtering. The PL intensity of the hybrid structures shows a slight increase with increasing thickness of the Ag layer (t) up to 12 nm, but for t > 12 nm, it shows a sharp increase, and becomes almost 5times larger at t = 16 nm than that of the bare IZO film, very consistent with their t-dependent sheet resistance behaviors. These observations are discussed based on the surface-plasmon-mediated emission mechanism.
저온 분자선 에피택시법을 이용한 GaMnAs 자성반도체 성장 및 특성 연구
박진범,고동완,박용주,오형택,신춘교,김영미,박일우,변동진,이정일,Park Jin-Bum,Koh Dongwan,Park Young Ju,Oh Hyoung-taek,Shinn Chun-Kyo,Kim Young-Mi,Park Il-Woo,Byun Dong-Jin,Lee Jung-Il 한국재료학회 2004 한국재료학회지 Vol.14 No.4
The LT-MBE (low temperature molecular beam epitaxy) allows to dope GaAs with Mn over its solubility limit. A 75 urn thick GaMnAs layers are grown on a low temperature grown LT-GaAs buffer layer at a substrate temperature of $260^{\circ}C$ by varying Mn contents ranged from 0.03 to 0.05. The typical growth rate for GaMnAs layer is fixed at 0.97 $\mu\textrm{m}$/h and the V/III ratio is varied from 25 to 34. The electrical and magnetic properties are investigated by Hall effect and superconducting quantum interference device(SQUID) measurements, respectively. Double crystal X-ray diffraction(DCXRD) is also performed to investigate the crystallinity of GaMnAs layers. The $T_{c}$ of the $Ga_{l-x}$ /$Mn_{x}$ As films grown by LT-MBE are enhanced from 38 K to 65 K as x increases from 0.03 into 0.05 whereas the $T_{c}$ becomes lower to 45 K when the V/III ratio increases up to 34 at the same composition of x=0.05. This means that the ferromagnetic exchange coupling between Mn-ion and a hole is affected by the growth condition of the enhanced V/III ratio in which the excess-As and As-antisite defects may be easily incorporated into GaMnAs layer.
Silicon Rich OxyNitride 비휘발성 메모리 구조에서의 계면상태 특성 연구
이연환,조훈영,김원식,서명원,오종수,오형택 한국물리학회 2006 새물리 Vol.53 No.6
The interface states and the activation energies in non-volatile MOS (metal-oxide-silicon) memory devices with SRON (silicon rich oxy-nitride) structures on Si substrates have been investigated using DLTS (deep level transient spectroscopy) and CV (capacitance-voltage) measurements. Especially, for the evaluation of the interface charge trapped at the interface, small pulse DLTS (SP-DLTS) measurements were used. From SP-DLTS, the D$_{it}$ (interface state density) is calculated to be 3.3 $\times$ 10$^{11}$ cm$^{-2}$eV$^{-1}$ in the as-prepared SRON sample, but is 4.8 $\times$ 10$^{10}$ cm$^{-2}$eV$^{-1}$in the sample annealed at 800$^\circ$C for 30 min. Also, D$_{it}$ was found to lower 2.0 $\times$ 10$^{10}$ cm$^{-2}$eV$^{-1}$ in the sample annealed at 1000 $^\circ$C for 60 min. This show that the interface states can affect the flat-band voltage shift, which affects the memory characteristics in SRON memory structures, and the that observed interface states might be related with silicon dangling bonds (SDB) or Si-H bonds. Also, the interface states in SRON structures can be controlled during thermal annealing processes. 실리콘 기판 위에 SRON (Silicon Rich Oxy-Nitride)구조로 제작한 비휘발성 금속 산화막 실리콘 (metal-oxide-silicon, MOS) 메모리 소자의 계면 상태 밀도, 포획 단면적, 그리고 활성화 에너지를 조사하기 위하여, DLTS (deep level transient spectroscopy) 와 CV (Capacitance-Voltage) 측정 방법을 이용하였다. 계면상태에서의 포획된 전하 (interface trap charge)를 조사하기에 위하여 SP-DLTS (small pulse DLTS) 측정 방법을 사용하여 비휘발성 메모리 구조의 계면 상태에서 포획된 전하 (interface trap charge)에 대하여 연구하였다. 비교 기준 시료인 SRON 구조 소자의 최대 D$_{it}$ (계면 상태 밀도)는 3.3 $\times$ 10$^{11}$ cm$^{-2}$eV$^{-1}$이었고, 대조군의 시료 중 800 $^\circ$C에서 30분 동안 열처리 한 소자의 계면 상태 밀도 D$_{it}$ 는 4.8 $\times$ 10$^{10}$ cm$^{-2}$ eV$^{-1}$이었으며, 1000 $^\circ$C에서 1시간 동안 열처리한 소자의 계면 상태 밀도 D$_{it}$ 는 2.0 $\times$ 10$^{10}$ cm$^{-2}$ eV$^{-1}$ 로 감소하는 것을 확인하였다. 이러한 결과로부터 본 연구에서는 계면 상태 밀도가 메모리 소자의 특성인 flat band voltage의 변화에 영향을 주는 것을 알 수 있었고, 이는 silicon dangling bond (SDB) 결함이나 Si-H bond에 의한 것으로 제안한다. 또한 열처리 과정을 통하여 MOS 소자의 계면 상태 밀도를 조절 할 수 있었다.