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Investigation of Particle Adhesion Force for Green Nanotechnology in Post-CMP Cleaning
신운기,정해도,안준호 한국정밀공학회 2012 International Journal of Precision Engineering and Vol.13 No.7
Cleaning process occupies more than 35 % of semiconductor fabrication and handles the reliability of products and device yield which is becoming more important in semiconductor fabrication. In spite of its high efficiency, RCA cleaning wastes a huge amount of chemical and water, and exerts the negative effect on the environment. The physical cleaning becomes a key technology with super diluted chemistry in lower temperature for green nanotechnology. This paper deals with an optimization of PVA brush scrubbing which is the most popular physical cleaning method for defect-free surface in Post-CMP cleaning. The particle adhesion force depending on the interfacial reaction was analyzed by the developed friction force monitoring system, real contact area system and AFM scratch test. The experimental result showed that the increase of friction force according to brush pressure leads to decrease of contamination and increase of total scratches. The particle removal force depending on the interfacial reaction was analyzed by detected friction force and the surface defects were verified by AFM and FE-SEM. Therefore, this paper suggests the optimization of PVA brush cleaning condition associated with cleaning efficiency and surface defect for green manufacturing.
신운기,박선준,이현섭,정문기,이영균,이호준,김영민,조한철,주석배,정해도,Shin, Woon-Ki,Park, Sun-Joon,Lee, Hyun-Seop,Jeong, Moon-Ki,Lee, Young-Kyun,Lee, Ho-Jun,Kim, Young-Min,Cho, Han-Chul,Joo, Suk-Bae,Jeong, Hae-Do 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.1
Copper (Cu) had been attractive material due to its superior properties comparing to other metals such as aluminum or tungsten and considered as the best metal which can replace them as an interconnect metal in integrated circuits. CMP (Chemical Mechanical Polishing) technology enabled the production of excellent local and global planarization of microelectronic materials, which allow high resolution of photolithography process. Cu CMP is a complex removal process performed by chemical reaction and mechanical abrasion, which can make defects of its own such as a scratch, particle and dishing. The abrasive particles remain on the Cu surface, and become contaminations to make device yield and performance deteriorate. To remove the particle, buffing cleaning method used in post-CMP cleaning and buffing is the one of the most effective physical cleaning process. AE(Acoustic Emission) sensor was used to detect dynamic friction during the buffing process. When polishing is started, the sensor starts to be loaded and produces an electrical charge that is directly proportional to the applied force. Cleaning efficiency of Cu surface were measured by FE-SEM and AFM during the buffing process. The experimental result showed that particles removed with buffing process, it is possible to detect the particle removal efficiency through obtained signal by the AE sensor.
Local/Global Planarization of Polysilicon Micropatterns by Selectivity Controlled CMP
신운기,김형재,주석배,정해도,박성민 한국정밀공학회 2009 International Journal of Precision Engineering and Vol. No.
The planarization CMP, which is considered as one of the most important ULSI chip, is introduced to make flat surface in patterned areas for multilevel MEMS devices. However, the conventional CMP is limited in its application to MEMS structures, due to their wide patterns of ㎛ to mm order thick film layer of several ㎛. A new CMP process has been developed for application to MEMS structures by the control of selectivity between polysilicon and silicon oxide. A 30nm thick protective oxide layer is deposited to protect the recessed areas, and then polished with low selectivity slurry to partially remove the protruded area while suppressing the removal rate of the recessed area. During the second step of the new CMP process, high selectivity slurry is used to minimize the dishing amount and the variation in the step height according to pattern size and density. Experimental results showed that dishing amount was less than 30nm at the largest pattern of 1250㎛ in width and showed no variation of entire pattern, which meant local and global planarization. This result suggests that the newly developed selectivity controlled CMP process can be successfully applied for fabrication the multilevel MEMS devices.
신운기(Woonki Shin),이영균(Youngkyun Lee),정호빈(Hobin Jeong),조형호(Hyungho Jo),정해도(Haedo Jeong) 대한기계학회 2010 대한기계학회 춘추학술대회 Vol.2010 No.11
Cu CMP is a hybrid removal process performed by complicated chemical reaction and mechanical abrasion, which can make defects of its own such as a scratch, particle and dishing. The abrasive particles remain on the Cu surface, and become contaminations to make device yield and performance deteriorate. Especially, it is not so easy to remove particles in the down area such as scratch, deep trench and dishing. The paper deals with the correlation between dishing amount and cleaning ability according to Cu pattern size. For the experiment, a Cu CMP test was done to create a dishing, and followed by a PVA scrubbing of colloidal silica particles which are adhered on the recessed Cu patterns. The experimental result showed that residual particles increased with dishing amount. The particle removal efficiency normally decreases with time passed, since the adsorption condition of particle to Cu surface changes from physical to chemical.
CMP공정에서 웨이퍼-패드의 실접촉면적 분포에 관한 연구
이창석(Changsuk Lee),이호준(Hojun Lee),신운기(Woonki Shin),정해도(Haedo Jeong) 대한기계학회 2010 대한기계학회 춘추학술대회 Vol.2010 No.11
The surface roughness among the properties of the polishing pad is important factor that determines chemical mechanical polishing (CMP) results. Because polishing pad contact with wafer directly. In this paper, the effect of pad surface roughness on pad surface images and real contact area (RCA) between wafer and pad in CMP have been investigated. First, we acquired pad surface images that used confocal microscope. At this step, we got gap of peak, valley and topography. Next, we confirmed real contact area between wafer and pad used optical microscope finally we checked real contact point size and distribution.