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      • KCI등재

        음성신호 처리를 위한 SC 필터 특성개선

        조성익,방준호,이근호,Cho, Sung-Ik,Bang, Jun-Ho,Lee, Keun-Ho 한국음향학회 1997 韓國音響學會誌 Vol.16 No.6

        본 논문에서는 SC 적분기와 SC Lossy 적분기로 구성된 SC필터에서 위상에러를 제거하기 위한 LDI 클럭방법 및 SC Lossy 적분기의 댐핑항에서 허수부분을 제거할 수 있는 방법을 제시하여 LDI 5차 elliptic 저역통과 SC 필터를 설계하였다. SC 필터 CMOS OP=AMP를 전원전압 ${\pm}$5V, MOSIS 2-${\mu}$m double-poly double-metal n-well CMOS 공정파라미터로 설계하여 SC 시뮬레이터인 SCANAP 프로그램을 통해 시뮬레이션 한 결과 설계된 SC 필터특성이 개선되었다. 집적회로를 위하여 MOSIS 2--${\mu}$m double-poly double-metal n-well CMOS 설계규칙에 따라 레이아웃 하였다. In the SC filter consist of SC integrator and SC Lossy Integrator, after this paper proposes the method that cancels phase error using LDI clock and the imaginary part in damping term of SC Lossy integrator, LDI fifth order elliptic low-pass SC filter is designed. With the result of SCANAP program simulation applying the designed CMOS OP-Amp using power supply ${\pm}$5V and MOSIS 2--${\mu}$m double-poly double-metal n-well CMOS design rule.

      • KCI등재

        단독주택지 지구단위계획지침에 대한 거주자 만족도 연구

        조성익(Cho Sung-Ik),박지영(Park Ji-Young) 대한건축학회 2012 대한건축학회논문집 Vol.28 No.5

        The purpose of this study was to analyze the Urban Design Guidelines for the single-family house district through the post-occupancy satisfaction survey. For the survey, this study had picked Sungnam Pangyo New Town which was planned to build about 2000 single-family houses in the area. The major findings of this study were as follows: the survey found that the residents presented the strong dissatisfactions on the guidelines of defining the house density and the distance between the houses which could impact on their privacy, natural lighting and ventilation. Also, the majority of residents showed the negative responses to the restrictions on the height of fence, front gate and ground level which intimidated the safeness and privacy of their properties, while it intended the openness from the street. The survey also showed the discontent with the restriction of the dwelling use of basement. To sum up, in order to develop the Urban Design Guidelines which could reflect the residents’ ever-changing needs, there should be a post-occupancy monitoring system. The system should specially focus on the architectural elements which are related to the issue of privacy, personal health and safety.

      • KCI등재
      • KCI등재

        과도방사선 검출을 위한 핵폭발 검출기 제작 및 검증

        정상훈(Sang-Hun Jeong),이승민(Seung-Min Lee),이남호(Nam-Ho Lee),김하철(Ha-Chul Kim),조성익(Seong-Ik Cho) 대한전기학회 2013 전기학회논문지 Vol.62 No.5

        In this paper, proposed NED(nuclear event detectors) for detection of a transient radiation. Nuclear event detector was blocked of power temporary for defence of critical damage at a electric device when a induced transient radiation. Conventional NED consist of BJT, resistors and capacitors. The NED supply voltage of 5V and MCM(Multi Chip Module) structures. The proposed NED were designed for low supply voltage using 0.18um CMOS process. The response time of proposed NED was 34.8ns. In addition, pulse radiation experiments using a electron beam accelerator, the output signal has occurred.

      • KCI등재

        개선된 자동 주파수 보정회로를 이용한 광대역 클록 발생기 설계

        정상훈(Sang-Hun Jeong),유남희(Nam-Hee Yoo),조성익(Seong-Ik Cho) 대한전기학회 2011 전기학회논문지 Vol.60 No.2

        In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350㎒, and a VCO frequency is 270㎒. The lock time of clock generator is less then 3us at input reference frequency, 67.5㎒. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1㎽ at 1.8V supply and layout area is 0.384㎟.

      • KCI등재

        CMOS 0.18um 공정 단위소자의 방사선 영향 분석

        정상훈(Sang-Hun Jeong),이남호(Nam-Ho Lee),이민웅(Min-Woong Lee),조성익(Seong-Ik Cho) 대한전기학회 2017 전기학회논문지 Vol.66 No.3

        In this study, we analyzed the effects of TID(Total Ionizing Dese) and TREE(Transient Radiation Effects on Electronics) on nMOSFET and pMOSFET fabricated by 0.18um CMOS process. The size of nMOSFET and pMOSFET is 100um/1um(W/L). The TID test was conducted up to 1 Mrad(Si) with a gamma-ray(Co-60). During the TID test, the nMOSFET generated leakage current proportional to the applied dose, but that of the pMOSFET was remained in a steady state. The TREE test was conducted at TEST LINAC in Pohang Accelerator Laboratory with a maximum dose-rate of 3.16×10<SUP>8</SUP>rad(Si)/s. In that test nMOESFET generated a large amount of photocurrent at a maximum of 3.16 × 10<SUP>8</SUP>rad(si)/s. Whereas, pMOSFETs showed high TREE immunity with a little amount of photocurrent at the same dose rate. Based on the results of this experiment, we will progress the research of the radiation hardening for CMOS unit devices.

      • KCI등재

        디코더 면적을 줄이는 새로운 전류구동 셀 매트릭스 DAC 구조

        정상훈(Sang-Hun Jeong),신홍규(Hong-Gyu Shin),조성익(Seong-Ik Cho) 대한전기학회 2009 전기학회논문지 Vol.58 No.3

        This paper presents a novel current steering cell matrix DAC(digital-to-analog converter) architecture to reduce decoder area. The current cell matrix of a existing architecture is selected by columns and lows thermometer code decoder of input bits. But The current cell matrix of a proposal architecture is divided 2n by the thermometer code decoder of upper input bits and are selected by the thermometer code decoder of middle and lower input bits. Because of this configuration, decoder numbers have increased. But the gate number that composed of decoder has decreased.. In case of the designed 8 bit current steering cell matrix DAC, the gate number of decoder has decreased by about 55% in comparison with a existing architecture.

      • KCI등재

        증강현실 내비게이션의 인지적.행동적 영향에 관한 연구

        김경호,조성익,이재식,원광연,Kim, Kyong-Ho,Cho, Sung-Ik,Lee, Jae-Sik,Wohn, Kwang-Yun 한국시뮬레이션학회 2009 한국시뮬레이션학회 논문지 Vol.18 No.4

        Navigation system providing route-guidance and traffic information is one of the most widely used driver-support system these days. Most of the navigation system is based on the 2D map paradigm so the information is ed and encoded from the real world. As a result it imposes a cognitive burden to the driver to interpret and translate the ed information to real world information. As a new concept of navigation system, augmented-reality navigation system (AR navigation) is suggested recently. It provides navigational guidance by imposing graphical information on real image captured by camera mounted on a vehicle in real-time. The ultimate goal of navigation system is to assist the driving task with least driving workload whether it is based on the abstracted graphic paradigm or realistic image paradigm. In this paper, we describe the comparative studies on how map navigation and AR navigation affect for driving tasks by experimental research. From the result of this research we obtained a basic knowledge about the two paradigms of navigation systems. On the basis of this knowledge, we are going to find the optimal design of navigation system supporting driving task most effectively, by analyzing characteristics of driving tasks and navigational information from the human-vehicle interface point of view.

      • KCI등재

        과도방사선에 의한 CMOS 소자 Latch-up 모델 연구

        정상훈(Sang-Hun Jeong),이남호(Nam-Ho Lee),이민수(Min-Su Lee),조성익(Seong-Ik Cho) 대한전기학회 2012 전기학회논문지 Vol.61 No.3

        Transient radiation is emitted during a nuclear explosion. Transient radiation causes a fatal error in the CMOS circuit as a Upset and Latch-up. In this paper, transient radiation NMOS, PMOS, INVERTER SPICE model was proposed on the basisi of transient radiation effects analysis using TCAD(Technology Computer Aided Design). Photocurrent generated from the MOSFET internal PN junction was expressed to the current source and Latch-up phenomenon in the INVERTER was expressed to parasitic thyristor for the transient radiation SPICE model. For example, the proposed transient radiation SPICE model was applied to CMOS NAND circuit.. SPICE simulated characteristics were similar to the TCAD simulation results. Simulation time was reduced to 120 times compared to TCAD simulation.

      • KCI등재

        I 형 게이트 내방사선 n-MOSFET 구조 설계 및 특성분석

        이민웅,조성익,이남호,정상훈,김성미,Lee, Min-woong,Cho, Seong-ik,Lee, Nam-ho,Jeong, Sang-hun,Kim, Sung-mi 한국정보통신학회 2016 한국정보통신학회논문지 Vol.20 No.10

        본 논문에서는 일반적인 실리콘 기반 n-MOSFET(n-type Metal Oxide Semiconductor Field Effect Transistor)의 절연 산화막 계면에서 방사선으로부터 유발되는 누설전류 경로를 차단하기 위하여 I형 게이트 n-MOSEFT 구조를 제안하였다. I형 게이트 n-MOSFET 구조는 상용 0.18um CMOS(Complementary Metal Oxide Semiconductor) 공정에서 레이아웃 변형 기법을 이용하여 설계되었으며, ELT(Enclosed Layout Transistor)와 DGA(Dummy Gate-Assisted) n-MOSFET와 같은 레이아웃 변형 기법을 사용한 기존 내방사선 전자소자의 구조적 단점을 개선하였다. 따라서, 기존 구조와 비교하여 반도체 칩 제작에서 회로 설계의 확장성을 확보할 수 있다. 또한, 내방사선 특성 검증을 위하여 TCAD 3D(Technology Computer Aided Design 3-dimension) tool을 사용하여 모델링과 모의실험을 수행하였고, 그 결과 I형 게이트 n-MOSFET 구조의 내방사선 특성을 확인하였다. In this paper, we proposed a I-gate n-MOSFET (n-type Metal Oxide Semiconductors Field Effect Transistor) structure in order to mitigate a radiation-induced leakage current path in an isolation oxide interface of a silicon-based standard n-MOSFET. The proposed I-gate n-MOSFET structure was designed by using a layout modification technology in the standard 0.18um CMOS (Complementary Metal Oxide Semiconductor) process, this structure supplements the structural drawbacks of conventional radiation-tolerant electronic device using layout modification technology such as an ELT (Enclosed Layout Transistor) and a DGA (Dummy Gate-Assisted) n-MOSFET. Thus, in comparison with the conventional structures, it can ensure expandability of a circuit design in a semiconductor-chip fabrication. Also for verification of a radiation-tolerant characteristic, we carried out M&S (Modeling and Simulation) using TCAD 3D (Technology Computer Aided Design 3-dimension) tool. As a results, we had confirmed the radiation-tolerant characteristic of the I-gate n-MOSFET structure.

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