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      • 초고속 회전체 내구성 향상을 위한 Co-alloy(T800)의 초고속 용사코팅

        조동율(Tong Yul Cho),윤재홍(Jae Hong Yoon),김길수(Kil Su Kim),박봉규(Bong Kyu Park),윤석조(Suk Jo Youn),백남기(Nam Ki Back) 한국생산제조학회 2006 한국공작기계학회 춘계학술대회논문집 Vol.2006 No.-

        The traditional high wear resistant coatings such as hard chrome plating and ceramic coatings have been replacing progressively by other coating methods such as HVOF thermal spray coating because of the environmental pollution of very toxic hex-Cr known as carcinogen having toxicity greater than arsenic and cadmium by chrome plating and chrome plated products and the brittleness of ceramic coatings(6, 7). Co-alloy(T800) micron size powder was coated on Inconel 718 by HVOF thermal spraying for the studies of the improvement of durability of high speed air bearing spindle. Coatings were prepared by Taguchi program for the parameters of spray distance, flow rates of hydrogen and oxygen and powder feed rate. Optimal coating process was determined by the studies of coating properties such as micro-structure, porosity, surface roughness and micro hardness. Friction and wear behaviors of coatings were investigated by sliding wear test with counter sliding stainless steel 304 ball at room temperature and at elevated temperature of 1000°F(538℃). At room temperature wear debris of the coating were roughly reduced to 15 times less and friction coefficients were decreased to more than a half compared with the surface of non-coated parent material. At high temperature of 538℃ wear debris and friction coefficients of the coatings were drastically decreased compared with non-coated surface of parent material. These drastic decreases of both wear debris and friction coefficient of the coatings compared with those of non-coated surface of parent material shows that Co-alloy(T800) coating is highly recommendable for the durability improvement surface coating of high speed air-bearing spindle. At high temperature wear traces and friction coefficients of both coating and non-coating were drastically reduced compared with those of room temperature since the oxides such as CoO, CO₃O₄, MoO₂, MoO₃, and etc were formed easily on the surface, and the brittle oxide phases were attrited by the reciprocating sliding wear according to the complicated mixed mechanisms such as oxidative wear by direct reaction with oxygen, abrasion by scratching or gouging at the asperities by the sliding ball, slurry erosion by the mixture of solid particles and small drops of the melt of the attrited particles, cavitation by the relative motions among the coating, sliding ball and melt, and corrosive wear by the corrosion environment induced by the frictional heat and local high temperature(8, 17). These oxide particles and the melt play role as lubricant and reduce the wear and friction coefficient. This also shows that Co-alloy(T800) coating is highly recommendable for the durability improvement surface coating on the surface vulnerable to frictional heat such as high speed air-bearing spindles.

      • KCI등재
      • KCI우수등재

        입체표면 폴리실리콘 전극에서 PECVD Ta₂O5 유전박막의 전기적 특성

        조용범(Yong-Beom Cho),이경우(Kyung-Woo Lee),천희곤(Hui-Gon Chun),조동율(Tong-Yul Cho),김선우(Sun-Oo Kim),김형준(Hyeong-Joon Kim),구경완(Kyung-Wan Koo),김동원(Dong-Won Kim) 한국진공학회(ASCT) 1993 Applied Science and Convergence Technology Vol.2 No.2

        DRAM 커패시터에서 축전용량을 증대시키기 위한 기초연구로서 2가지 방법을 시도하였다. 첫째로, 커패시터의 유효 표면적을 증대시키기 위해 HSG(hemispherical grain)와 rugged 형태의 표면형상을 갖는 폴리실리콘 전극을 저압 화학기상증착법을 이용하여 제작하였다. 그 결과 기존의 평평한 폴리실리콘 전극에 비하여 유효면적이 증대된 폴리실리콘 전극이 형성되었다. 둘째로, 고유 전상수를 갖는 Ta₂O_5 박막을 각각의 전극에 플라즈마 화학기상증착법으로 증착시키고 후열처리한 후 전기적 특성변화를 조사하였다. MIS(metal-insulator-semiconductor) 구조의 커패시터를 제작하여 전기적 특성을 측정한 결과, HSG와 rugged 형상의 표면을 갖는 전극에서 기존의 평평한 표면을 갖는 전극에 비하여 축전용량은 1.2 ~1.5배까지 증대하였으나, 누설전류는 표면적의 증가에 따라 함께 증가함을 보였다. TDDB 특성에서도 HSG와 rugged 형상의 표면을 갖는 전극들이 평평한 표면형상에 비하여 더 열화되었음을 보여주었다. 이상과 같은 결과는 Ta₂O_5 유전박막을 이용한 차세대 DRAM 커패시터 연구에 기초자료로 이용될 수 있을 것으로 본다. In order to increase the capacitance of storage electrode in the DRAM capacitor, two approaches were performed. First, hemispherical and rugged poly silicon films were made by LPCVD to increase the effective surface area of storage electrode. The even surface morphology of conventional poly silicon electrode was changed into the uneven surface of hemispherical or rugged poly silicon films. Second, PECVD Ta₂O_5 dielectric films were deposited and thermally treated to study the dielectrical characteristics of Ta₂O_5 film on each electrode. MIS capacitors with Ta₂O_5 films were electrically characterized by I-V, C-V and TDDB measurements. As a result, the capacitance of the electrode with uneven surface were increased by a factor of 1.2~ 1.5 and leakage current was increased compared with those of even surface. TDDB result indicates that the electrode with uneven surface has dielectrically more degraded than that of even surface. These results can be helpful as a basic research to develop new generation DRAM capacitors with Ta₂O_5, films.

      • KCI등재

        고속화염용사코팅으로 제조된 WC-CoFe 코팅의 기계적 특성에 관한 연구

        주윤곤 ( Yun Kon Joo ),조동율 ( Tong Yul Cho ),하성식 ( Sung Sik Ha ),이찬규 ( Chan Gyu Lee ),천희곤 ( Hui Gon Chun ),허성강 ( Sung Gang Hur ),윤재홍 ( Jae Hong Yoon ) 한국열처리공학회 2012 熱處理工學會誌 Vol.25 No.1

        HVOF thermal spray coating of 80%WC-CoFe powder is one of the most promising candidate for the replacement of the traditional hard chrome plating and hard ceramics coating because of the environmental problem of the very toxic Cr6+ known as carcinogen by chrome plating and the brittleness of ceramics coatings. 80%WC-CoFe powder was coated by HVOF thermal spraying for the study of durability improvement of the high speed spindle such as air bearing spindle. The coating procedure was designed by the Taguchi program, including 4 parameters of hydrogen and oxygen flow rates, powder feed rate and spray distance. The surface properties of the 80%WC-CoFe powder coating were investigated roughness, hardness and porosity. The optimal condition for thermal spray has been ensured by the relationship between the spary parameters and the hardness of the coatings. The optimal coating process obtained by Taguchi program is the process of oxygen flow rate 34 FRM, hydrogen flow rate 57 FRM, powder feed rate 35 g/min and spray distance 8 inch. The coating cross-sectional structure was observed scanning electron microscope before chemical etching. Estimation of coating porosity was performed using metallugical image analysis. The Friction and wear behaviors of HVOF WC-CoFe coating prepared by OCP are investigated by reciprocating sliding wear test at 25oC and 450oC. Friction coefficients (FC) of coating decreases as sliding surface temperature increases from 25oC to 450oC. (Received October 31, 2011; Revised November 15, 2011; Accepted December 16, 2011)

      • KCI우수등재

        입체표면 폴리실리콘 전극에서 PECVD $Ta_2O_5$ 유전박막의 전기적 특성

        조영범,이경우,천희곤,조동율,김선우,김형준,구경완,김동원,Cho, Yong-Beom,Lee, Kyung-Woo,Chun, Hui-Gon,Cho, Tong-Yul,Kim, Sun-Oo,Kim, Hyeong-Joon,Koo, Kyung-Wan,Kim, Dong-Won 한국진공학회 1993 Applied Science and Convergence Technology Vol.2 No.2

        In order to increase the capacitance of storage electrode in the DRAM capacitor, two approaches were performed. First, hemispherical and rugged poly silicon films were made by LPCVD to increase the effective surface area of storage electrode. The even surface morphology of conventional poly silicon electrode was changed into the uneven surface of hemispherical of rugged poly silicon films. Second, PECVD $Ta_2O_5$ dielectric films were deposited and thermally treated to study the dielectrical characteristics of $Ta_2O_5$ film on each electrode. MIS capacitors with $Ta_2O_5$ films were electrically characterized by I-V, C-V and TDDB measurements. As a result, the capacitance of the electrode with uneven surface were increased by a factor of 1.2~1.5 and leakage current was increased compared with those of even surface. TDDB result indicates that the electrode with uneven surface has dielectrically more degraded than that of even surface. These results can be helpful as a basic research to develop new generation DRAM capacitors with $Ta_2O_5$ films. DRAM 커패시터에서 축정용량을 증대시키기 위한 기초연구로서 2가지 방법을 시도하였다. 첫째로, 커패시터의 유효 표면적을 증대시키기 위해 HSG(hemispherical grain)와 rugged 형태의 표면형상을 갖는 폴리실리콘 전극을 저압 화학기상증착법을 이용하여 제잘하였다. 그 결과 기존의 평평한 폴리실리콘 전극에 비하여 유효면적이 증대된 폴리실리콘 전극이 형성되었다. 둘째로, 고유 전상수를 갖는 $Ta_2O_5$ 박막을 각각의 전극에 플라즈마 화학기상증착법으로 증착시키고 후열처리한 후 전기적 특성변화를 조사하였다. MIS(metal-insulator-semiconductor) 구조의 커패시터를 제작하여 전기적 특성을 측정한 결과, HSG와 rugged 형상의 표면을 갖는 전극에서 기존의 평평한 표면을 갖는 전극에 비하여 축전용량은 1.2~1.5배까지 증대하였으나, 주설전류는 표면적의 증가에 따라 함께 증가함을 보였다. TDDB 특성에서도 HSG와 rugged 형상의 표면을 갖는 전극들이 평평한 표면형상에 비하여 더 열화되었음을 보여주었다. 이상과 같은 결과는 $Ta_2O_5$ 유전박막을 이용한 차세대 DRAB 커패시터 연구에 기초자료로 이용될 수 있을 것으로 본다.

      • KCI우수등재

        텅스텐 폴리사이드 게이트 구조에서의 열처리 효과

        고재석(Jae-Seog Koh),천희곤(Hui-Gon Chun),조동율(Tong-Yul Cho),구경완(Kyung-Wan Koo),홍봉식(Bong-Sik Hong) 한국진공학회(ASCT) 1992 Applied Science and Convergence Technology Vol.1 No.3

        인이 고농도로 도우핑된 다결정 실리콘상에 LPCVD 방법으로 텅스텐 실리사이드막을 증착하였다. 폴리사이드 구조에 여러 가지 조건으로 열처리를 한 뒤, XTEM, SIMS 및 고주파 C-V법 등으로 분석하였다. 열처리에 따라 다결정 실리콘내 도판트 불순물이 텅스텐 실리사이드를 통해 외향확산하여 실리콘 산화막 계면부근에 인의 공핍층을 형성하게 된다. 이와 같은 공핍층이 존재하므로서 게이트 용량이 감소하게 되고, 실효 게이트 산화막의 두께가 증가하는 것으로 나타났다. Tungsten silicide films were deposited on the highly phosphorus-doped poly Si/SiO₂/Si substrates by Low Pressure Chemical Vapor Deposition. They were heat treated in different conditions. XTEM, SIMS and high frequency C-V analyses were conducted for characterization. It can be concluded that outdiffusion of phosphorus impurity through the silicide films lead to its depletion in the poly-Si gate region near the gate oxide, resulting in loss of capacitance and increase of effectiv gate oxide thickness.

      • KCI등재후보

        SF6와 SF6 - N2 가스를 이용한 텅스텐 박막의 플라즈마 식각에 관한 연구

        고용득(Yong Deuk Ko),정광진(Kwang Jin Jeong),최성호(Song Ho Choi),구경완(Kyoung Wan Koo),조동율(Tong Yul Cho),천희곤(Hui Gon Chun) 한국센서학회 1999 센서학회지 Vol.8 No.3

        The plasma etching of tungsten thin films has been studied with SF_6 gas in RIE system. The etch rate of a - phase W film with SF_6 gas plasma has been showed to depend strongly on process parameters (SF_6, SF_6-N₂ gas). Effect of Nz addition and etching selectivity between W film and photoresist have also been studied in detail. Etching profiles between W film and photoresist were investigated by SEM. The compounds on W surface after SF_6-N₂ gas plasma treatment were examined by XPS and the concentration of F ions was detected by OES during plasma on.

      • KCI등재

        SKD61과 Radical Nitriding 처리된 SKD61 기판상에 Arc Ion Plating으로 증착된 TiN 박막의 미세구조 및 기계적 특성, 마찰 및 접착력에 관한 연구

        주윤곤(Yun-Kon Joo),윤재홍(Jae-Hong Yoon),방위(Wei Fang),장세굉(Shi-Hong Zhang),조동율(Tong-Yul Cho),하성식(Sung-Sik Ha) 한국표면공학회 2007 한국표면공학회지 Vol.40 No.6

        TiN coating on tool steel has been widely used for the improvement of durability of tools. In this work, radical nitriding(RN) is carried out on SKD61 at 450℃ for 5 hours in the ammonia gas pressure 2.7×10³ ㎩. The TiN coating is carried out by arc ion plating(AIP) with the process parameters: arc power 150 A, bias voltage ?50 V, coating time 40 minutes and nitrogen gas pressure 4×10³ ㎩. Hardness, elastic modulus, friction coefficient and adhesion of TiN coating on substrates of both TiN/SKD61 and TiN/RN SKD61 coatings are investigated comparatively. The primary crystalline faces of TiN surface are (200) and (111) for TiN/SKD61 and TiN/RN SKD61 respectively. In addition to the primary phase, Fe phase exists in TiN/SKD61 coating, but not in TIN/RN SKD61. The hardness of TiN/RN SKD61 is about 700 Hv, 250 Hv(56%) higher than that of TiN/SKD61 at the near interface of TiN and substrates. At the TiN surface, hardness of TiN/RN SKD61 is 2,149 Hv, 71 Hv(3%) higher than that of TiN/SKD61. The elastic modulus of TiN coating is improved to 26.7 G㎩(6%) by radical nitriding. The adhesion is improved by the RN coating showing no spalling. buckling and chipping on the scratch test track which are shown on the non-RN TiN/SKD61.

      • UV/Cl₂(g)에 의한 Si-wafer 표면금속 오염물의 건식세정에 관한 연구

        손동수,정광진,최성호,천희곤,조동율 울산대학교 1998 공학연구논문집 Vol.29 No.2

        본 연구에서는 실리콘 웨이퍼 표면에 존재하는 미량의 Zn, Fe, Ti 금속 오염물들이 UV-excited chlorine radical을 이용한 건식세정 방법으로 제거되는 반응과정을 연구 하였다. 실리콘 웨이퍼 상에 진공증착법으로 원형패턴이 있는 Zn, Fe, Ti 박막을 증착시켜 상온 및 200℃에서 UV/CI₂세정하였을 때, 염소 래디컬(CI*)이 Fe, Zn, Ti와 반응하여 제거되는 것을 반응 전후 광학현미경과 SEM을 통해 표면 형상 변화를 관찰하였고, in-line으로 연결된 XPS를 통해서 반응 후 웨이퍼 표면에 남아있는 화합물의 화학적 결합상태를 관찰하였으며, UV/CI₂세정 후 실리콘 기판이 손상받는 정도를 알기 위해 AFM으로 표면 거칠기를 측정하였다. 광학현미경과 SEM의 분석에 의하면 Zn와 Fe는 쉽게 제거되는 반면 염화물을 형성하기 보다는 휘발성이 적은 산화물을 형성하는 경향이 강한 Ti은 약간만 제거되는 것을 확인하였다. XPS 분석을 통해서 이들 금속 오염물들이 chlorine radical과 반응하여 웨이퍼 표면에 금속 염화물을 형성하고 있는 것을 확인하였고, UV/CI₂세정처리를 하였을 때 실리콘 웨이퍼의 표면 거칠기가 약간 증가하는 것을 알 수 있었다. 지금까지의 결과를 통해 볼 때, 습식세정과 UV/CI₂건식세정을 병행하면 플라즈마 및 레이저를 사용하는 다른 건식세정 방법에 비하여 보다 저온에서 실리콘 기판의 큰 손상 없이 비교적 용이하게 금속 오염물을 제거할 수 있음을 알수 있었다. The reaction mechanisms of dry cleaning of Zn, Fe and Ti trace contaminants on the Si wafer using UV/CI₂ have been studied by SEM, AFM and XPS analyses. The patterned Zn, Fe and Ti films were deposited on the Si wafer surface by thermal evaporation and changes in the surface morphology after dry cleaning using CI₂and UV/CI₂at 200℃ were studied by optical microscopy and SEM. In addition changes in surface roughness of Si wafer by the cleaning was observed by AFM. The chemical bonding states of the Zn, Fe and Ti deposited silicon surface were observed with in-line XPS analysis. Zn and Fe were easily cleaned in the form of volatile zinc-chloride and iron-chloride as verified by the surface morphology changes. Ti which forms involatile oxides was not easily removed at room temperature but was slightly removed by UV/CI₂at elevated temperature of 200℃. It was also found that the surface roughness of the Si wafer increased after CI₂and UV/CI₂cleaning. Therefore, the metallic contaminants on the Si wafer can be easily removed at lower temperature by continuous processes of wet cleaning followed by UV/CI₂dry cleaning.

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