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Passive 스타 구조를 갖는 고속 광 ATM 망에서의 채널 할당 알고리즘
이남재,강인곤,이팔진,金永川 全北大學校 1994 論文集 Vol.38 No.-
In single hop lightwave networks, the system performance using ALOHA-based protocols depends on the number of minislots in a data transmission frame. But, in the case of adopting this protocol to ATM, the multi-control channels are required in order to improve the system performance because the size of cell is fixed and short. In this paper, we propose a dynamic channel allocation algorithm with two-control channels. This algorithm dynamically alloctes channel for prioritized traffic in high-speed optical ATM networks. In order to evalute the performance of proposed algorithm, we simulate in terms of per channel throughput, cell loss rate. and cell delay with variations in offered load.
Performance Analysis and Comparison of Massively Parallel Architectures
Kim, Young Chon,Kang, In Gon 전북대학교 공업기술연구소 1990 工學硏究 Vol.21 No.-
A performance analysis of a competing massively parallel architectures(hypercube, hypernet, torus and mesh of trees) is presented. The discription for these architectures are considered. The worst case distance, average distance, nomalized average distance, and link load are defined and analyzed for the performance comparison.
HiPi 버스를 갖는 캐쉬 기반형 멀티프로세서 시스템의 성능 평가
고석범,박경,황인석,강인곤,김영천 전북대학교 공업기술연구소 1991 工學硏究 Vol.22 No.-
Shared bus structure is usually used for a small-scaled multiprocessor system because of easy implementation and low cost But, overall performance of system is limited by bandwidth and transfer rate of the bus. Shortcomes of this structured multiprocessor system sre the shared bus bolttleneck and the increasement of the memory access time. these problems can be solved by using the multiple cache memory and the improvement of bus protocol. In this paper, multiprocessor system using HiPi bus and multiple cache memory is considered and described to improve the performance of time shared bus structure. HiPi bus uses pended protocol to increase the bus capacity. Cache to cache transfer mode is proposed to enhance the performance of HiPi bus. The performance of multiprocessor system with HiPi bus and that of multiprocessor system with modified HiPI bus are analyzed and compared. An analytical model for this system is described by Markov state diagram to compute the probability of each state. And, the modeling and simulation are done using SLAM III simulation language. The number of processors, hit ratio and the probability of the read operation are used as the input parameters. The utilization of processors,. address/data bus, and memory are measured and evaluated.