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선반 가공조건에 따른 경화처리된 A17075-T6 소재의 가공특성 변화에 관한 연구
이희덕,김정석,정지훈,임학진,Lee, Hee-Deok,Kim, Jeong-Suk,Jeong, Ji-Hoon,Im, Hak-Jin 한국생산제조학회 2012 한국생산제조학회지 Vol.21 No.1
The cutting characteristics of hardened aluminum alloy A17075-T6 were investigated during turning processing. Under variation conditions of cutting speed, depth of cut, and feed rate, the characteristics of cutting force, surface roughness, and machined texture were investigated. Surface roughness became worse in proportion to the increase of the feed rate. The thickness of material alteration layer which is derived from the effect of cutting force was the biggest when feed rate 0.148mm/rev. This research confirmed that the deformed layer is dominantly dependent on the variation of feed rate.
박제준,정명상,김진국,이희덕,강민구,송희은,Park, Je Jun,Jeong, Myeong Sang,Kim, Jin Kuk,Lee, Hi-Deok,Kang, Min Gu,Song, Hee-eun 한국전기전자재료학회 2013 전기전자재료학회논문지 Vol.26 No.1
Crystalline silicon solar cells with $SiN_x/SiN_x$ and $SiN_x/SiO_x$ double layer anti-reflection coatings(ARC) were studied in this paper. Optimizing passivation effect and optical properties of $SiN_x$ and $SiO_x$ layer deposited by PECVD was performed prior to double layer application. When the refractive index (n) of silicon nitride was varied in range of 1.9~2.3, silicon wafer deposited with silicon nitride layer of 80 nm thickness and n= 2.2 showed the effective lifetime of $1,370{\mu}m$. Silicon nitride with n= 1.9 had the smallest extinction coefficient among these conditions. Silicon oxide layer with 110 nm thickness and n= 1.46 showed the extinction coefficient spectrum near to zero in the 300~1,100 nm region, similar to silicon nitride with n= 1.9. Thus silicon nitride with n= 1.9 and silicon oxide with n= 1.46 would be proper as the upper ARC layer with low extinction coefficient, and silicon nitride with n=2.2 as the lower layer with good passivation effect. As a result, the double layer AR coated silicon wafer showed lower surface reflection and so more light absorption, compared with $SiN_x$ single layer. With the completed solar cell with $SiN_x/SiN_x$ of n= 2.2/1.9 and $SiN_x/SiO_x$ of n= 2.2/1.46, the electrical characteristics was improved as ${\Delta}V_{oc}$= 3.7 mV, ${\Delta}_{sc}=0.11mA/cm^2$ and ${\Delta}V_{oc}$=5.2 mV, ${\Delta}J_{sc}=0.23mA/cm^2$, respectively. It led to the efficiency improvement as 0.1% and 0.23%.
고속 반도체 소자에서 배선 간의 Crosstalk에 의한 Coupling Capacitance 변화 분석
지희환,한인식,박성형,김용구,이희덕,Ji Hee-Hwan,Han In-Sik,Park Sung-Hyung,Kim Yong-Goo,Lee Hi-Deok 대한전자공학회 2005 電子工學會論文誌-SD (Semiconductor and devices) Vol.42 No.5
In this paper, novel test patterns and on-chip data are presented to indicate that the variation of coupling capacitance, ${\Delta}Cc$ by crosstalk can be larger than static coupling capacitance, Cc. It is also shown that ${\Delta}Cc$ is strongly dependent on the phase of aggressive lines. for anti-phase crosstalk ${\Delta}Cc$ is always larger than Cc while for in-phase crosstalk ${\Delta}Cc$ is smaller than Cc. HSPICE simulation shows good agreement with the measurement data. 본 논문에서는 Crosstalk에 의한 coupling capacitance의 변화량, ${\Delta}Cc$이 기본값인 Cc보다 더 커질 수 있음을 제안한 테스트 회로를 이용하여 실험적으로 증명하였다. 또한 ${\Delta}Cc$가 Aggressive line의 위상에 매우 의존함을 보였으며 위상이 같은 경우보다 반대인 경우에 ${\Delta}Cc$가 크게 됨을 보였다. 실험 결과의 타당성을 검증을 위해 HSPICE 시뮬레이션을 수행하여 실험치와 잘 맞음을 나타내었다.
단결정 실리콘 태양전지의 도핑 최적화를 위한 확산 온도에 대한 연구
최성진(Choi Sung-Jin),송희은(Song Hee-Eun),유권종(Yoo Kwon-Jong),유진수(Yoo Jin-Soo),한규민(Han Kyu-Min),권준영(Kwon Jun-Young),이희덕(Lee Hi-Deok) 한국태양에너지학회 2011 한국태양에너지학회 논문집 Vol.31 No.1
In this paper, the optimized doping condition of crystalline silicon solar cells with 156 × 156㎟ area was studied. To optimize the drive-in temperature in the doping process, the other conditions except variable drive-in temperature were fixed. These conditions were obtained in previous studies. After etching 7㎛ of the surface to form the pyramidal structure, the silicon nitride deposited by the PECVD had 75∼80㎚ thickness and 2 to 2.1 for a refractive index. The silver and aluminium electrodes for front and back sheet, respectively, were for medby screen-printing method, followed by firing in 400-425-450-550-850℃ five-zone temperature conditions to make the ohmic contact. Drive-in temperature was changed in range of 830℃ to 890℃ to obtain the sheet resistance 30∼70Ω/□ with 10Ω/□ intervals. Solar cell made in 890℃ as the drive-in temperature revealed 17.1% conversion efficiency which is best in this study. This solar cells showed 34.4 ㎃/㎠ of the current density, 627 ㎷ of the open circuit voltage and 79.3% of the fill factor.
Nano-scale CMOS를 위한 Ni-germano Silicide의 열 안정성 연구
황빈봉,오순영,윤장근,김용진,지희환,김용구,왕진석,이희덕,Huang, Bin-Feng,Oh, Soon-Young,Yun, Jang-Gn,Kim, Yong-Jin,Ji, Hee-Hwan,Kim, Yong-Goo,Wang, Jin-Suk,Lee, Hi-Deok 한국전기전자재료학회 2004 전기전자재료학회논문지 Vol.17 No.11
In this paper, novel methods for improvement of thermal stability of Ni-germano Silicide were proposed for nano CMOS applications. It was shown that there happened agglomeration and abnormal oxidation in case of Ni-germano Silicide using Ni only structure. Therefore, 4 kinds of tri-layer structure, such as, Ti/Ni/TiN, Ni/Ti/TiN, Co/Ni/TiN and Ni/Co/TiN were proposed utilizing Co and Ti interlayer to improve thermal stability of Ni-germano Silicide. Ti/Ni/TiN structure showed the best improvement of thermal stability and suppression of abnormal oxidation although all kinds of structures showed improvement of sheet resistance. That is, Ti/Ni/TiN structure showed only 11 ohm/sq. in spite of 600 $^{\circ}C$, 30 min post silicidation annealing while Ni-only structure show 42 ohm/sq. Therefore, Ti/Ni/TiN structure is highly promising for nano-scale CMOS technology.
TCAD 시뮬레이션을 이용한 Fin형 SONOS Flash Memory의 모서리 효과에 관한 연구
양승동,오재섭,윤호진,정광석,김유미,이상율,이희덕,이가원,Yang, Seung-Dong,Oh, Jae-Sub,Yun, Ho-Jin,Jeong, Kwang-Seok,Kim, Yu-Mi,Lee, Sang-Youl,Lee, Hee-Deok,Lee, Ga-Won 한국전기전자재료학회 2012 전기전자재료학회논문지 Vol.25 No.2
Fin-type SONOS (silicon-oxide-nitride-oxide-silicon) flash memory has emerged as novel devices having superior controls over short channel effects(SCE) than the conventional SONOS flash memory devices. However despite these advantages, these also exhibit undesirable characteristics such as corner effect. Usually, the corner effect deteriorates the performance by increasing the leakage current. In this paper, the corner effect of fin-type SONOS flash memory devices is investigate by 3D Process and device simulation and their electrical characteristics are compared to conventional SONOS devices. The corner effect has been observed in fin-type SONOS device. The reason why the memory characteristic in fin-type SONOS flash memory device is not improved, might be due to existing undesirable effect such as corner effect as well as the mutual interference of electric field in the fin-type structure as reported previously.