2중 Al 배선을 위한 금속층간 SOG 박막의 형성

백종무,정영철,이용수,이봉현 대한전자공학회 1994 전자공학회논문지-A Vol.31 No.8

Intermetallic dielectric layer was formed by using SiO$_2$/SOG/SiO$_2$ for aluminum based dual-metal interconnection process and its electric characteristics were evaluated. The dielectric layer was in the cost and facility point of view more useful than the insulator that was formed by etch-back process. The planarity by using SOG process was about 40% higher than that of the insulator by the CVD process. When SiO$_2$ films were deposited by the PECVD process the Al hillock formation during the next process was restrained bucause the intermetalic insulator was made at low temperature. The leakage current was 1${\times}10^{7}~1{\times}10^{-8}A/cm^{2}$ at the electric field of 10$^{5}$V/cm and breakdown filed was 4.5${\times}10^{6}~7{\times}10^{6}A/cm$. So we had confirmed that siloxane SOG was very useful for intermetallic layer material.

X-Ray 진찰용 고전압 공진형 DC-DC 컨버터 설계

백종무,주해종,조문택,이충식 한국방사선학회 2010 한국방사선학회 논문지 Vol.4 No.4

본 논문은 공진형 인버터로 구성된 X-ray 고전압 발생기와 고주파 고전압 변압기의 운영 시스템을 제안하였다. X 선 발생장치는 무소음화와 소형화하였으며, 50[㎑]이상의 구동 주파수로 동작하게 하였고, 일반전원을 사용할 때 발생 한 전력으로 인한 노이즈, 조사조건의 저하문제 등의 문제점을 해소하였다. 또한, X선관 전압 제어기와 관전류 제어기 및 고주파 고전압 변압기의 필라멘트 가열용 변압기를 고주파용으로 설 계, 제작함으로써 X선 장치의 효율적 운영이 되도록 하였다. In this paper, including the X-ray high voltage resonant inverter generators and high frequency high voltage transformer operating systems is proposed. X-ray generator removes the noise and was smaller, 50[㎑] to work more with the driving frequencies, and that occurred when the normal power supply available due to noise, survey the conditions and solve the problems of the poor was a problem. In addition, X-ray tube voltage, frequency controllers and tube current controller filament heating voltage transformer for high frequency transformer design and manufacture of doing X-ray devices were to become more efficient operation.

NMOSFET의 Hot-Carrier 열화현상

백종무(Baek, Jong-Mu),김영춘(Kim, Young-Choon),조문택(Cho, Moon-Taek) 한국산학기술학회 2009 한국산학기술학회논문지 Vol.10 No.12

본 논문에서는 아날로그 회로에 사용되는 NMOSFET에 대한 Hot-Carrier 열화특성을 조사하였다. 여러 값을 갖는 게이트 전압으로 스트레스를 인가한 후, 소자의 파라미터 열화를 포화 영역에서 측정하였다. 스트레스 게이트 전압의 범위에 따라 계면 상태(interface state) 뿐 아니라 전자와 정공의 포획이 드레인 근처 게이트 산화막에서 확인 되었다. 그리고 특히 낮은 게이트 전압의 포화영역에서는 정공의 포획이 많이 발생하였다. 이러한 전하들의 포획은 전달 컨덕턴스 (gm) 및 출력 컨덕턴스 (gds)의 열화의 원인이 된다. 아날로그 동작 범위의 소자에서 파라미터 열화는 소자의 채널 길이에 매우 민감하게 반응한다. 채널길이가 짧을수록 정공 포획이 채널 전도도에 미치는 영향이 증가하 게 되어 열화가 증가되었다. 이와 같이 아날로그 동작 조건 및 아날로그 소자의 구조에 따라 gm 및 gds의 변화가 발 생하므로 원하는 전압 이득(AV=gm/gds)을 얻기 위해서는 회로 설계시 이러한 요소들에 대한 고려가 필요하다. This study has provided some of the first experimental results of NMOSFET hot-carrier degradation for the analog circuit application. After hot-carrier stress under the whole range of gate voltage, the degradation of NMOSFET characteristics is measured in saturation region. In addition to interface states, the evidences of hole and electron traps are found near drain depending on the biased gate voltage, which is believed to the cause for the variation of the transconductance(gm) and the output conductance(gds). And it is found that hole trap is a dominant mechanism of device degradation in a low-gate voltage saturation region, The parameter degradation is sensitive to the channel length of devices. As the channel length is shortened, the influence of hole trap on the channel conductance is increased. Because the magnitude of gm and gds are increased or decreased depending on analog operation conditions and analog device structures, careful transistor design including the level of the biased gate voltage and the channel length is therefore required for optimal voltage gain (AV=gm/gds) in analog circuit.

기반 기술 : 새로운 트렌치 게이트 MOSFET 제조 공정기술 및 특성

백종무 ( Jong Mu Baek ),조문택 ( Moon Taek Cho ),나승권 ( Seung Kwon Na ),백종무 ( Jong Mu Baek ),조문택 ( Moon Taek Cho ),나승권 ( Seung Kwon Na ) 한국항행학회 2014 韓國航行學會論文誌 Vol.18 No.4

본 논문에서는 트렌치 게이트 MOSFET에 적용을 위한 고 신뢰성을 갖는 트렌치 형성기술과 고품격의 제조기술을 제안하였다. 이는 향후 전력용 MOSFET 에 널리 적용이 가능하다. 트렌치 구조는 DMOSFET에서 셀 피치크기를 줄여서 Ron 특성을 개선하거나 대다수 전력용 IC에서 전력용 소자를 다른 CMOS(Complementary Metal Oxide Semiconductor) 소자로부터 독립시킬 목적으로 채용된다. 마스크 레이어를 사용하여 자기정렬기술과 산화막 스페이서가 채용된 고밀도 트렌치 MOSFET를 제작하기 위한 새로운 공정방법을 구현하였다. 이 기술은 공정 스텝수를 감소시키고 트렌치 폭과 소오스, p-body 영역을 감소시킴으로써 결과적으로 셀 밀도와 전류 구동성능을 증가시키며 온 저항의 감소를 가져왔다. In this paper, high reliable trench formation technique and a novel fabrication techniques for trench gate MOSFET is proposed which is a key to expend application of power MOSFET in the future. Trench structure has been employed device to improve Ron characteristics by shrinkage cell pitch size in DMOSFET and to isolate power device part from another CMOS device part in some power integrated circuit. A new process method for fabricating very high density trench MOSFETs using mask layers with oxide spacers and self-align technique is realized. This technique reduces the process steps, trench width and source and p=body region with a resulting increase in cell density and current driving capability and decrease in on resistance.

온도에 의존하지 않는 전압 감시회로에서의 바이어스 회로의 설계

문종규,백종무 대한전자공학회 1998 電子工學會論文誌, C Vol.c35 No.9

본 논문에서는 온도에 의존하지 않는 전압 감시회로에서 바이어스 회로에 대한 설계 방법을 제안한다. 제안한 방법을 실현하기 위하여 비교기를 구성하는 트랜지스터의 순방향 전압과 V/sub T/(Thermal Voltage) 그리고 저항 등의 서로 다른 온도계수 차이를 이용한다. 즉, 전압 감시회로에서 각각 다른 온도계수를 갖는 소자를 이용하여 서로 상쇄되도록 바이어스회로를 실현한다. 그리고 전압 감시회로의 기준전압은 비교기를 구성하는 트랜지스터의 순방향 전압 차(△V/sub BE/)를 이용하여 구현한다. 이 기준전압과 저항 및 V/sub BE/ 멀티플라이어를 이용하여 전압 감시회로의 검출전압을 설계한다. 제안한 회로의 동작검증을 위해 IC로 제작하였다. HP4145B와 온도 Chamber를 이용하여 특성을 평가한 결과, 온도변화율이 -0.01 %/℃ ∼ -0.025 %/℃의 양호한 특성을 얻었다. In this paper, a design of bias circuit in temperature independent voltage detect circuit is proposed. In order to realize this intention, we are used the differences in temperature coefficient of thermal voltage, resistor and transistor forward voltage(V$\sub$BE/) which is consisted in comparator. That is, It is realized by compensating the difference of temperature coefficient due to using components with each different temperature coefficient. As well, reference voltage of the circuit is accomplished by the difference of transistor forward voltage($\Delta$V$\sub$BE/) in comparator. In using reference voltage, resistor and V$\sub$BE/ Multiplier, we can design detect voltage of the circuit. In order to test operation of proposing circuit, we manufactured IC. Then, we measured operating characteristics and capability of the circuit by using HP4145B and temperature chamber. The result, we could obtain the good variation of temperature from -0.01 %/$^{\circ}C$ to -0.025 %/$^{\circ}C$.

기준 전압원을 사용하지 않는 저 소비 전력 감시 회로의 설계 ( A Design of a low power dissipation voltage dectect circuit without reference voltage source )

문종규,백종무 대한전자공학회 1996 전자공학회논문지-B Vol.33 No.12B

양성자가 주입된 NPT형 전력용 다이오드의 전류-전압 특성

김병길,백종무,이재성,배영호,Kim Byoung-Gil,Baek Jong-Mu,Lee Jae-Sung,Bae Young-Ho 한국전기전자재료학회 2006 전기전자재료학회논문지 Vol.19 No.1

Local minority carrier lifetime control by means of particle irradiation is an useful technology for Production of modern silicon Power devices. Crystal damage due to ion irradiation can be easily localized by choosing appropriate irradiation energy and minority tarrier lifetime can be reduced locally only in the damaged layer. In this work, proton irradiation technology was used for improving the switching characteristics of a un diode. The irradiation was carried out with various energy and dose condition. The device was characterized by current-voltage, capacitance-voltage, and reverse recovery time measurements. Forward voltage drop was increased to 1.1 V at forward current of 5 A, which was $120\%$ of its original device. Reverse leakage current was 64 nA at reverse voltage of 100 V, and reverse breakdown voltage was 670 V which was the same voltage as original device without irradiation. The reverse recovery time of device was reduced to about $20\%$ compared to that of original device without irradiation.

수소 및 중수소가 포함된 실리콘 산화막의 전기적 스트레스에 의한 열화특성

이재성,백종무,정영철,도승우,이용현,Lee, Jae-sung,Back, Jong-mu,Jung, Young-chul,Do, Seung-woo,Lee, Yong-hyun 한국전기전자재료학회 2005 전기전자재료학회논문지 Vol.18 No.11

Experimental results are presented for the degradation of 3 nm-thick gate oxide $(SiO_2)$ under both Negative-bias Temperature Instability (NBTI) and Hot-carrier-induced (HCI) stresses using P and NMOSFETS, The devices are annealed with hydrogen or deuterium gas at high-pressure $(1\~5\;atm.)$ to introduce higher concentration in the gate oxide. Both interface trap and oxide bulk trap are found to dominate the reliability of gate oxide during electrical stress. The degradation mechanism depends on the condition of electrical stress that could change the location of damage area in the gate oxide. It was found the trap generation in the gate oxide film is mainly related to the breakage of Si-H bonds in the interface or the bulk area. We suggest that deuterium bonds in $SiO_2$ film are effective in suppressing the generation of traps related to the energetic hot carriers.

마이크로 센서에의 응용을 위한 SnO₂_(-x)열산화 박막의 특성

김태훈,정완영,홍영호,백종무,최만식,이덕동 경북대학교 센서기술연구소 1994 센서技術學術大會論文集 Vol.5 No.1

SnO_(2-x) thin films were prepated by thermal evaporation of metal tin granules on silicon wafer and were oxidized under various furnace termperature in exposure to O_(2). Mobility, carrier concerntration and resistivity of the SnO_(2-x) thin films were measured by Hall effect measurement and 4-point probe method. The temperature profile in thermal oxidation showed great effects on electric properites and surface structures of the thin films. The thin films were used for the sensing membrane of C_(4)H_(10) microsensor. The contact characteristics of Pt electrode-SnO_(2-x) and sensing properties of the films were investigated.

양성자 주입 기술을 이용한 초고속 회복 다이오드의 제작

이강희,김병길,이용현,백종무,이재성,배영호,Lee, Kang-Hee,Kim, Byoung-Gil,Lee, Yong-Hyun,Baek, Jong-Mu,Lee, Jae-Sung,Bae, Young-Ho 한국전기전자재료학회 2004 전기전자재료학회논문지 Vol.17 No.12

Proton irradiation technology was used for the improvement of power diode switching characteristics. Proton irradiation was carried out at the energies of 2.32 MeV, 2.55 MeV, 2.97 MeV so that the projection range of irradiated proton would be at the metallurgical junction, depletion region and neutral region of pn diode, respectively. Dose conditions were varied into three conditions of 1${\times}$10$^{11}$ cm$^{-2}$ , 1${\times}$10$^{12}$ cm$^{-2}$ , 1${\times}$10$^{13}$ cm$^{-2}$ at each condition of energies. Characterization of the device was performed by I-V(current-voltage), C-V(capacitance-voltage) and trr(reverse recovery time) measurement. At the optimum condition of irradiation, the reverse recovery time of device has been reduced about 1/5 compared to that of original un-irradiated device.