Monolithic Metal Oxide Transistors

Choi, Yongsuk,Park, Won-Yeong,Kang, Moon Sung,Yi, Gi-Ra,Lee, Jun-Young,Kim, Yong-Hoon,Cho, Jeong Ho American Chemical Society 2015 ACS NANO Vol.9 No.4

<P>We devised a simple transparent metal oxide thin film transistor architecture composed of only two component materials, an amorphous metal oxide and ion gel gate dielectric, which could be entirely assembled using room-temperature processes on a plastic substrate. The geometry cleverly takes advantage of the unique characteristics of the two components. An oxide layer is metallized upon exposure to plasma, leading to the formation of a monolithic source-channel-drain oxide layer, and the ion gel gate dielectric is used to gate the transistor channel effectively at low voltages through a coplanar gate. We confirmed that the method is generally applicable to a variety of sol-gel-processed amorphous metal oxides, including indium oxide, indium zinc oxide, and indium gallium zinc oxide. An inverter NOT logic device was assembled using the resulting devices as a proof of concept demonstration of the applicability of the devices to logic circuits. The favorable characteristics of these devices, including (i) the simplicity of the device structure with only two components, (ii) the benign fabrication processes at room temperature, (iii) the low-voltage operation under 2 V, and (iv) the excellent and stable electrical performances, together support the application of these devices to low-cost portable gadgets, i.e., cheap electronics.</P>

Multifunctional Hybrid Multilayer Gate Dielectrics with Tunable Surface Energy for Ultralow-Power Organic and Amorphous Oxide Thin-Film Transistors

Byun, Hye-Ran,You, Eun-Ah,Ha, Young-Geun American Chemical Society 2017 ACS APPLIED MATERIALS & INTERFACES Vol.9 No.8

<P>For large-area, printable, and flexible electronic applications using advanced semiconductors, novel dielectric materials with excellent capacitance, insulating property, thermal stability, and mechanical flexibility need to be developed to achieve high-performance, ultralow-voltage operation of thin-film transistors (TFTs). In this work, we first report on the facile fabrication of multifunctional hybrid multilayer gate dielectrics with tunable surface energy via a low-temperature solution-process to produce ultralow-voltage organic and amorphous oxide TFTs. The hybrid multilayer dielectric materials are constructed by iteratively stacking bifunctional phosphonic acid based self-assembled monolayers combined with ultrathin high-k oxide layers. The nanoscopic thickness-controllable hybrid dielectrics exhibit the superior capacitance (up to 970 nF/cm(2)), insulating property (leakage current densities <10(-7) A/cm(2)), and thermal stability (up to 300 degrees C) as well as smooth surfaces (root-mean-square roughness <0.35 nm). In addition, the surface energy of the hybrid multilayer dielectrics are easily changed by switching between mono and bifunctional phosphonic acid based self-assembled monolayers for compatible fabrication with both organic and amorphous oxide semiconductors. Consequently, the hybrid multilayer dielectrics integrated into TFTs reveal their excellent dielectric functions to achieve high-performance, ultralow-voltage operation (< +/- 2 V) for both organic and amorphous oxide TFTs. Because of the easily tunable surface energy, the multifunctional hybrid multilayer dielectrics can also be adapted for various organic and inorganic semiconductors, and metal gates in other device configurations, thus allowing diverse advanced electronic applications including ultralow-power and large-area electronic devices.</P>

Role of Gallium Doping in Dramatically Lowering Amorphous-Oxide Processing Temperatures for Solution-Derived Indium Zinc Oxide Thin-Film Transistors

Jeong, Sunho,Ha, Young-Geun,Moon, Jooho,Facchetti, Antonio,Marks, Tobin J. WILEY-VCH Verlag 2010 Advanced Materials Vol.22 No.12

<B>Graphic Abstract</B> <P>Ga doping in indium zinc oxide (IZO)-based amorphous-oxide semiconductors (AOSs) promotes the formation of oxide-lattice structures with oxygen vacancies at low annealing temperatures, which is essential for acceptable thin-film-transistor performance (see figure). The mobility dependence on annealing temperature and AOS composition are analyzed and the chemical role of Ga is clarified, as required for solution-processed, low-temperature-annealed AOSs. <img src='wiley_img_2010/09359648-2010-22-12-ADMA200902450-content.gif' alt='wiley_img_2010/09359648-2010-22-12-ADMA200902450-content'> </P>

Amorphous Si–Zn–Sn–O Thin Film Transistor with In–Si–O as Transparent Conducting Electrodes

황진영,이상렬 한국전기전자재료학회 2019 Transactions on Electrical and Electronic Material Vol.20 No.4

We revealed a novel method to fabricate amorphous silicon-zinc-tin-oxide (a-SZTO) thin-fi lm transistors (TFTs) has been reported with transparent Indium–silicon–oxide (ISO) source/drain (S/D) electrodes. The presented TFTs exhibited a high fi eld-eff ect mobility of 14.65 cm 2 /Vs, a threshold voltage of 2.87 V, and a low subthreshold swing of 0.39 V/decade. It is suggested that the small work function of ISO (4.49 eV) compared to that of a-SZTO (4.53 eV) induces an ohmic contact at the ISO/SZTO junction, which makes it possible the eff ective injection of electrons from oxide materials into the a-SZTO semiconductor. Determine the stability of a-SZTO TFTs under Negative bias temperature stress (NBTS) was measured ΔV TH = 1.21 V at 333 K, and − 20 V for 7200 s.

Metal Oxide Thin Film Phototransistor for Remote Touch Interactive Displays

Ahn, Seung‐,Eon,Song, Ihun,Jeon, Sanghun,Jeon, Youg Woo,Kim, Young,Kim, Changjung,Ryu, Byungki,Lee, Je‐,Hun,Nathan, Arokia,Lee, Sungsik,Kim, Gyu Tae,Chung, U‐,In WILEY‐VCH Verlag 2012 Advanced Materials Vol.24 No.19

<P><B>The photoresponse characteristics of metal‐oxide (MeO) semiconductor photosensors</B> have been studied. Compared to the amorphous‐Si‐based photo‐TFT, the MeO photo‐TFT demonstrates superior EQE and responsivity. However, due to its inherent slow recovery to the dark state after the illumination is stopped, a unique sensing scheme suitable for the high‐speed array operation is used, yet maintaining a simple array architecture as a solution for large‐area interactive displays.</P>

게이트 절연막의 표면처리에 의한 비정질 인듐갈륨징크옥사이드 박막트랜지스터의 계면 상태 조절

김보슬,김도형,이상렬,Kim, Bo-Sul,Kim, Do-Hyung,Lee, Sang-Yeol 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.9

Recently, amorphous oxide semiconductors (AOSs) based thin-film transistors (TFTs) have received considerable attention for application in the next generation displays industry. The research trends of AOSs based TFTs investigation have focused on the high device performance. The electrical properties of the TFTs are influenced by trap density. In particular, the threshold voltage ($V_{th}$) and subthreshold swing (SS) essentially depend on the semiconductor/gate-insulator interface trap. In this article, we investigated the effects of Ar plasma-treated $SiO_2$ insulator on the interfacial property and the device performances of amorphous indium gallium zinc oxide (a-IGZO) TFTs. We report on the improvement in interfacial characteristics between a-IGZO channel layer and gate insulator depending on Ar power in plasma process, since the change of treatment power could result in different plasma damage on the interface.

Electrical Performance of Amorphous Oxide/Colloidal Quantum Dot/Amorphous Oxide Hybrid Thin Film Transistor

이병현,조경상,김상식,이상렬 한국전기전자재료학회 2022 Transactions on Electrical and Electronic Material Vol.23 No.1

Hybrid-type thin-film transistors were fabricated using amorphous oxide and colloidal quantum dots. To prevent damage to the quantum dots, amorphous SIZO, which can be processed at low temperatures, was deposited by RF sputtering. In the case of a general hybrid type device, it is known that the characteristics of a multilayer material are significantly lower than that of a single material, and this is greatly affected by the interface characteristics between each material. The electrical characteristics of a single SIZO TFT, such as threshold voltage, field-effect mobility, on/off current ratio, and subthreshold slope, have been observed as −0.15 V, 9.54 cm 2 /Vs, 2.9 × 10 8 , and 0.34 V/dec, respectively while electrical characteristics of hybrid-type OQO TFT were observed as 1.39 V, 9.19 cm 2 /Vs, 3.9 × 10 8 , and 0.35 V/dec, respectively. As a result, it was confirmed that the electrical characteristics did not change significantly when the single SIZO TFT and the hybrid type OQO TFT have been compared in this experiment. Its electrical properties are mainly driven by the upper and lower a-SIZO layers. a-SIZO which has amorphous properties, can provide excellent surface properties because it can completely cover the spherical QD when it comes into contact with the QD. These results are expected to be applicable to many important applications.

The Characteristics of Amorphous-Oxide-Semiconductor Thin-Film-Transistors According to the Active-Layer Structure

Ho-Nyeon Lee(이호년) 한국산학기술학회 2009 한국산학기술학회논문지 Vol.10 No.7

비정질 인듐-갈륨-아연 산화물 박막트랜지스터를 모델링 하여서, 능동층의 구조, 두께, 평형상태의 전자밀도 에 대응하는 박막트랜지스터의 특성을 연구하였다. 단일 능동층 박막트랜지스터의 경우, 능동층이 얇을 때 높은 전계 효과이동도를 보였다. 문턱전압의 절대값은 능동층의 두께가 20 nm일 때 최저치를 보였으며, 문턱전압이하 기울기는 두께에 대한 의존성을 보이지 않았다. 복층구조 능동층의 경우, 하부의 능동층이 높은 평형상태 전자밀도를 가질 때 보다 우수한 스위칭 특성을 보였다. 이 경우에도 능동층의 두께가 얇을 때에 높은 전계효과 이동도를 보였다. 높은 평형상태 전자밀도의 능동층의 두께를 증가시키면 문턱전압은 음의 방향으로 이동하였다. 문턱전압이하 기울기는 능 동층의 구조에 대하여 특별한 의존성을 보이지 않았다. 이상과 같은 데이터는 산화물반도체 박막트랜지스터 능동층의 구조, 두께, 도핑비율을 최적화함에 효과적으로 사용될 것으로 기대된다. Amorphous indium-gallium-zinc-oxide thin-film-transistors (TFTs) were modeled successfully. Dependence of TFT characteristics on structure, thickness, and equilibrium electron-density of the active layer was studied. For mono-active-layer TFTs, a thinner active layer had higher field-effect mobility. Threshold voltage showed the smallest absolute value for the 20 nm active-layer. Subthreshold swing showed almost no dependence on active-layer thickness. For the double-active-layer case, better switching performances were obtained for TFTs with bottom active layers with higher equilibrium electron density. TFTs with thinner active layers had higher mobility. Threshold voltage shifted in the minus direction as a function of the increase in the thickness of the layer with higher equilibrium electron-density. Subthreshold swing showed almost no dependence on active-layer structure. These data will be useful in optimizing the structure, the thickness, and the doping ratio of the active layers of oxide-semiconductor TFTs.

Electrothermal Annealing (ETA) Method to Enhance the Electrical Performance of Amorphous-Oxide-Semiconductor (AOS) Thin-Film Transistors (TFTs)

Kim, Choong-Ki,Kim, Eungtaek,Lee, Myung Keun,Park, Jun-Young,Seol, Myeong-Lok,Bae, Hagyoul,Bang, Tewook,Jeon, Seung-Bae,Jun, Sungwoo,Park, Sang-hee K.,Choi, Kyung Cheol,Choi, Yang-Kyu American Chemical Society 2016 ACS APPLIED MATERIALS & INTERFACES Vol.8 No.36

<P>An electro-thermal annealing (ETA) method, which uses an electrical pulse of less than 100 ns, was developed to improve the electrical performance of array-level amorphous-oxide-semiconductor (AOS) thin-film transistors (TFTs). The practicality of the ETA method was experimentally demonstrated with transparent amorphous In-Ga-Zn-O (a-IGZO) TFTs. The overall electrical performance metrics were boosted by the proposed method: up to 205% for the trans-conductance (g(m)), 158% for the linear current (I-linear) and 206% for the subthreshold swing (SS). The performance enhancement were interpreted by X-ray photoelectron microscopy (XPS), showing a reduction of oxygen vacancies in a-IGZO after the ETA. Furthermore, by virtue of the extremely short operation time (80 ns) of ETA, which neither provokes a delay of the mandatory TFTs operation such as addressing operation for the display refresh nor demands extra physical treatment, the semipermanent use of displays can be realized.</P>

Highly Stable Transparent Amorphous Oxide Semiconductor Thin‐Film Transistors Having Double‐Stacked Active Layers

Park, Jae Chul,Kim, Sangwook,Kim, Sunil,Kim, Changjung,Song, Ihun,Park, Youngsoo,Jung, U‐,In,Kim, Dae Hwan,Lee, Jang‐,Sik WILEY‐VCH Verlag 2010 Advanced Materials Vol.22 No.48

<P><B>A novel device structure</B> is presented for amorphous oxide semiconductor thin‐film transistors with high performance as well as improved electrical/optical stress stability. The highly stable transistor devices are developed using composition‐modulated dual active layers. This approach could potentially be used to fabricate product‐level display devices using amorphous oxide semiconductors in the near future. </P>