GaN 파워 소자의 효율 향상을 위한 공정 온도 제어

사공현철,최현식 조선대학교 IT연구소 2018 정보기술융합공학논문지 Vol.8 No.2

GaN power devices are attracting attention due to the growth of the electric vehicle market and interest in high efficiency power conversion circuits. GaN power devices have a high breakdown voltage, a nanosecond-level switching speed, and a low turn-on resistance, which are suitable for high efficient circuits. In future, GaN power devices are likely to be applied instead of silicon-based insulated gate bipolar transistors (IGBTs). However, GaN power devices still have a low reliability and a large deviation between devices. In this paper, the aim is to increase the efficiency of GaN power devices through proper process temperature by analyzing the reliability of devices and the device variations. The process temperature in this case is defined as the growth temperature of the AlGaN layer, which has the much influence on the reliability of the devices. 전기자동차 시장의 성장과 고효율 전력변환 회로에 대한 관심으로 GaN 파워 소자가 주목을 받고있다. GaN 파워 소자의 경우에는 높은 breakdown 전압을 가지고, 나노초 수준의 빠른 스위칭이 가능하고, 낮은 턴온 저항을 가지므로 고효율 회로에 적합하다. 향후 파워 회로에서는 실리콘 기반 의 insulated gate bipolar transistor (IGBT) 대신에 GaN 파워 소자가 적용될 가능성이 크다. 그러나 GaN 파워 소자의 경우에는 아직 낮은 신뢰성과 소자간의 편차가 큰 문제가 되고 있다. 본 논문에서는 공정 온도에 따른 소자의 신뢰도 변화와 소자간의 편차 변화를 분석하여, 적합한 공정 온도를 통한 GaN 파워 소자의 효율 증가를 목표로 한다. 이 경우의 공정 온도는 소자의 신뢰성에 가장 큰 영향을 줄 수 있는 AlGaN 층의 성장 온도로 정의하였다.

차세대 GaN RF 전력증폭 소자 및 집적회로 기술 동향

이상흥,임종원,강동민,백용순,Lee, S.H.,Lim, J.W.,Kang, D.M.,Baek, Y.S. 한국전자통신연구원 2019 전자통신동향분석 Vol.34 No.5

Gallium nitride (GaN) can be used in high-voltage, high-power-density/-power, and high-speed devices owing to its characteristics of wide bandgap, high carrier concentration, and high electron mobility/saturation velocity. In this study, we investigate the technology trends for X-/Ku-band GaN RF power devices and MMIC power amplifiers, focusing on gate-length scaling, channel structure, and power density for GaN RF power devices and output power level and output power density for GaN MMIC power amplifiers. Additionally, we review the technology trends in gallium arsenide (GaAs) RF power devices and MMIC power amplifiers and analyze the technology trends in RF power devices and MMIC power amplifiers based on both GaAs and GaN. Furthermore, we discuss the current direction of national research by examining the national and international technology trends with respect to X-/Ku-band power devices and MMIC power amplifiers.

Fabrication of vertical GaN Schottky barrier diodes on free-standing GaN substrates and their characterization

Jung Gyeong-Hun,Park Minwoo,Kim Kyoung-Kook,Kim Jongseob,Cho Jaehee 한국물리학회 2024 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.84 No.1

Vertical GaN Schottky barrier diodes (SBDs) on free-standing GaN substrates have garnered signifcant attention in recent years. Using a free-standing GaN substrate with a low defect density, a vertical GaN-on-GaN SBD can be operated under higher power-ratings and show a lower on-resistance and higher breakdown strength, compared to its lateral-current-fow counterpart. In this study, a vertical GaN SBD was fabricated with an epitaxially grown 10-μm-thick lightly doped n-type drift layer of GaN on a 400-μm-thick GaN substrate. An ohmic contact of a Ti/Al bilayer with a specifc contact resistivity of 1.9× 10−3 Ω cm2 was fabricated on the N-polarity GaN bottom surface. Sequentially, Ni electrode-based Schottky contacts were formed on the Ga-polarity top surface. Low reverse currents were observed, with Schottky barrier heights of approximately 0.9–1.0 eV. A mesa-etch process was employed to defne a channel width in the SBDs. The dependence of the mesa-etch depth on the breakdown voltage revealed a gradual increase in the breakdown voltage of the vertical GaN SBDs with the increase in mesa depth.

상시불통형 p-GaN/AlGaN/GaN 이종접합 트랜지스터의 게이트막 농도 계조화 효과

조성인(Seong-In Cho),김형탁(Hyungtak Kim) 한국전기전자학회 2020 전기전자학회논문지 Vol.24 No.4

본 연구에서는 상시불통형 p-GaN 전력반도체소자의 신뢰성 향상을 위해 p-GaN 게이트막 내부의 전계를 완화하고자 p-GaN 게이트 도핑농도의 계조화를 제안한다. TCAD 시뮬레이션으로 균일한 도핑농도를 갖는 소자와 문턱전압과 출력 전류 특성이 동일하도록 p형 농도를 계조화하고 최적화하였다. p-GaN 게이트층에서의 전계 감소로 소자의 게이트 신뢰성이 개선될 수 있을 것으로 판단된다. In this work, we proposed a graded gate-doping structure to alleviate an electric field in p-GaN gate layer in order to improve the reliability of normally-off GaN power devices. In a TCAD simulation by Silvaco Atlas, a distribution of the graded p-type doping concentration was optimized to have a threshold voltage and an output current characteristics as same as the reference device with a uniform p-type gate doping. The reduction of an maximum electric field in p-GaN gate layer was observed and it suggests that the gate reliability of p-GaN gate HFETs can be improved.

Analysis of Multiple Fin-type Vertical GaN Power Transistors based on Bulk GaN Substrates

Jun Hyeok Heo,Sang Ho Lee,Jin Park,So Ra Min,Geon Uk Kim,Ga Eon Kang,Jaewon Jang,Jin-Hyuk Bae,Sin-Hyung Lee,In Man Kang 대한전자공학회 2023 Journal of semiconductor technology and science Vol.23 No.1

In this study, the multiple fin-type vertical GaN power transistor based on the GaN-on-GaN were analyzed using the two-dimensional technical computer-aided design (2-D TCAD) simulations. In the field of the electric vehicle systems requiring a high operation voltage of 1,000 V or more, the power devices have a large device area because of the long distance between the gate region and the drain region. This problem can be addressed by using the fin-type vertical GaN power transistor, which can reduce the device area due to its vertical channel. For the high current performance, the multiple fin-type structure was required. Thus, we investigated characteristics depending on the number of fin (Nfin). By comparing the on-state drain currents (Ion), the breakdown voltages (BV), and the on-resistances (Ron) with different Nfin, this study provides an understanding of the electrical properties of the multiple fin-type vertical GaN power transistor affected by Nfin.

PEDOT:PSS/GaN 하이브리드 접합 소자의 PEDOT:PSS 두께에 따른 I-V 특성

신민정,안형수,이삼녕 한국물리학회 2014 새물리 Vol.64 No.11

We fabricated a hybrid structure composed of an organic semiconductor poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) and an inorganic semiconductor GaN. PEDOT:PSS films with various thicknesses were deposited on to an n-GaN epilayer by using a spin coater, and the dependence of the current-voltage characteristics on the thickness of the PEDOT:PSS layer was examined. The PEDOT:PSS layer was homogeneously deposited on GaN epilayer, moreover the thickness of PEDOT:PSS layer was decreased by increasing the spin speed. An optimum device characteristic with the highest current-rectifying behavior was observed when the thickness of the PEDOT:PSS layer was about 125 nm. The relatively-high ideality factor (n $\sim$ 14) seemed to be associated with carrier tunneling or recombination at the hybrid interface due to the presence of various defects. 본 연구에서는 유기물 반도체인 PEDOT:PSS와 무기물 반도체인 GaN를 이용하여 하이브리드 구조를 제작하였다. 스핀 코팅 방법을 이용해 GaN 위에 다양한 두께를 가지는 PEDOT:PSS층을 제작하였고 PEDOT:PSS층의 두께에 의존하는 전류-전압 특성을 연구하였다. 단면 측정을 통해, PEDOT:PSS 층이 GaN 에피층 위에 빈틈없이 균일하게 증착되었을 뿐만 아니라, 코팅 속도가 증가함에 따라 두께가 점차적으로 감소함을 확인할 수 있었다. 또한 PEDOT:PSS가 약 125 nm의 두께 일 때 가장 좋은 다이오드 특성을 확인 할 수 있었고, 이때 캐리어의 터널링 및 소자 계면에 존재하는 결함들에 의해 큰 값을 가지는 이상계수 (n $\sim$ 14)를 관찰 할 수 있었다.

Design and Efficiency Analysis 48V-12V Converter using Gate Driver Integrated GaN Module

김종완,최중묵,유세프알라브,제이슨라이,Kim, Jongwan,Choe, Jung-Muk,Alabdrabalnabi, Yousef,Lai, Jih-Sheng Jason The Korean Institute of Power Electronics 2019 전력전자학회 논문지 Vol.24 No.3

This study presents the design and experimental result of a GaN-based DC-DC converter with an integrated gate driver. The GaN device is attractive to power electronic applications due to its superior device performance. However, the switching loss of a GaN-based power converter is susceptible to the common source inductance, and converter efficiency is severely degraded with a large loop inductance. The objective of this study is to achieve high-efficiency power conversion and the highest power density using a multiphase integrated half-bridge GaN solution with minimized loop inductance. Before designing the converter, several GaN and Si devices were compared and loss analysis was conducted. Moreover, the impact of common source inductance from layout parasitic inductance was carefully investigated. Experimental test was conducted in buck mode operation at 48 -12 V, and results showed a peak efficiency of 97.8%.

GaN Power FET 모델링에 관한 연구

강이구,정헌석,김범준,이용훈,Kang, Ey-Goo,Chung, Hun-Suk,Kim, Beum-Jun,Lee, Young-Hun 한국전기전자재료학회 2009 전기전자재료학회논문지 Vol.22 No.12

In this paper, we proposed GaN trench Static Induction Transistor(SIT). Because The compound semiconductor had superior thermal characteristics, GaN and SiC power devices is next generation power semiconductor devices. We carried out modeling of GaN SIT with 2-D device and process simulator. As a result of modeling, we obtained 340 V breakdown voltage. The channel thickness was 3 urn and the channel doping concentration is $1e17\;cm^{-3}$. And we carried out thermal characteristics, too.

AlGaN/GaN HEMT 전력소자 시뮬레이션에 관한 연구

손명식 한국반도체디스플레이기술학회 2014 반도체디스플레이기술학회지 Vol.13 No.4

The next-generation AlGaN/GaN HEMT power devices need higher power at higher frequencies. To know the device characteristics, the simulation of those devices are made. This paper presents a simulation study on the DC and RF characteristics of AlGaN/GaN HEMT power devices. According to the reduction of gate length from 2.0μm to 0.1μm, the simulation results show that the drain current at zero gate voltage increases, the gate capacitance decreases, and the maximum transconductance increases, and thus the cutoff frequency and the maximum oscillation frequency increase. The maximum oscillation frequency maintains higher than the cutoff frequency, which means that the devices are useful for power devices at very high frequencies.

Design and Efficiency Analysis 48V-12V Converter using Gate Driver Integrated GaN Module

김종완,최중묵,유세프알라브,제이슨라이 전력전자학회 2019 전력전자학회 논문지 Vol.23 No.3

This study presents the design and experimental result of a GaN-based DC–DC converter with an integrated gate driver. The GaN device is attractive to power electronic applications due to its superior device performance. However, the switching loss of a GaN-based power converter is susceptible to the common source inductance, and converter efficiency is severely degraded with a large loop inductance. The objective of this study is to achieve high-efficiency power conversion and the highest power density using a multiphase integrated half-bridge GaN solution with minimized loop inductance. Before designing the converter, several GaN and Si devices were compared and loss analysis was conducted. Moreover, the impact of common source inductance from layout parasitic inductance was carefully investigated. Experimental test was conducted in buck mode operation at 48–12 V, and results showed a peak efficiency of 97.8%.