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The Placement Algorithm of the Shuffle-Exchange Graph Using Matrix
하기종,최영규,황호정,Hah, Ki Jong,Choi, Young Kyoo,Hwang, Ho Jung The Institute of Electronics and Information Engin 1987 전자공학회논문지 Vol.24 No.2
The shuffle-exchange graph is known as a structure to perform the parallel algorithms like Discrete Fourier Transform(DFT), matrix multiplication and sorting. In this paper, the layout for the shuffle-exchange graph is described and this layout places emphasis on the placement of nodes that has the capability to have as small area as possible, have as a small number of crossings as possible, and have as short wires as possible. The algorithm corrdsponding these conditions is proposed and each evaluation factor and the placement of the N-node shuffle-exchange graph is performed with FORTRAN and BASIC program, and these results are calcualted.
이중 채널 라우터를 사용하는 무선 센서네트워크를 위한 다중경로 라우팅 알고리즘
하기종,유승식,임상민,김병호,Hah, Ki-Jong,Yoo, Seung-Sik,Lim, Sang-Min,Kim, Brian 한국정보통신학회 2007 한국정보통신학회논문지 Vol.11 No.4
지속적인 데이터 전송이 필요한 센서네트워크의 경우 센서 노드가 증가할수록 네트워크의 요구 대역폭도 증가하게 되어 상대적으로 고속의 데이터 처리 및 전송이 필요하다. 본 논문에서는 이중채널 라우터를 사용하는 센서 네트워크에서 연속적인 데이터 스트림의 전송 속도를 최대화하기 위하여 여러 센서 노드로부터 싱크노드로의 다중경로를 설정하는 라우팅 알고리즘을 개발하고 제안하였다. 또한, 지그비 통신 모듈을 사용하는 이중채널 라우터에서 제안한 다중경로 알고리즘의 성능을 분석하였다. 실험을 통해 실제 통신 속도를 측정한 결과, 일반적인 단일 채널 라우터의 전송 성능의 2배에 가까운 150kbps 이상의 전송률을 안정적으로 얻을 수 있음을 확인하였다. In case of wireless sensor networks being applied to a target environment having continuous data transfer, high-speed data transmission and processing is necessary to meet increased bandwidth needs. This paper proposes a novel multipath routing algorithm to increase the bandwidth of continuous data stream for the wireless sensor network using dual channel routers. We evaluate performance of the proposed algorithm in the wireless sensor network using the dual channel touter based on ZigBee protocol. According to the experimental evaluation, the proposed algorithm showed outstanding performance enhancement with the bandwidth of 150kbps, which is about twice of existing single channel router.
이천희(Cheon Hee Yi),하기종(Ki Jong Hah) 한국정보과학회 1997 정보과학회 컴퓨팅의 실제 논문지 Vol.3 No.1
본 연구에서는 안티-퓨즈의 두 전극 층사이의 절연막 또는 유전막을 파괴하여 도통케하는 퓨징 기술을 위한 장치를 개발하여 소자를 퓨징시킨 다음 안티-퓨즈 스위칭 소자의 특성을 측정하고 분석하였다. 또한 FPGA 회사인 미국Actel 및 QuickLogic 사의 안티-퓨즈 특성과 ETRI 안티-퓨즈를 분석하여 그결과를 비교하였다. In this paper, We proposed an anti-fuse testing system. This system is implemented with a fusing technology that can have the characteristics of conductors after demolishing insulators or dielectrics between two polelayers of anti-fuse. Using the developed system, we fused anti-fuse elements, and then measured and analyzed the characteristics of anti-fuse switching elements. And we compared the characteristics of anti-fuses made by Actel and QuickLogic with the characteristics of anti-fuses made by ETRI.
실시간 시스팀 설계를 위한 대기 행렬 모델 적용 분석에 관한 연구
최영규(Young-gyu Choi),하기종(Ki-jong Hah),한창호(Chang-ho Han),허진영(Jin-young Heo),이천희(Cheon-hee Yi) 한국정보과학회 1993 한국정보과학회 학술발표논문집 Vol.20 No.2
본 논문은 실시간 처리 시스팀 개발시 적용되는 IPC 통신 설비중 특히 다량의 정보전달과 전송능력을 가진 메시지 큐 모델을 설정하여 정보처리 능력을 평가하기 위한 큐의 상황을 수학적으로 해석한 후 실제 환경에 적합하도록 시뮬레이션하였고, 이를 통해 얻어진 결과를 이론적 결과와 비교 분석하였다.
이천희(Yi Cheon Hee),하기종(Hah Ki Jong) 한국정보처리학회 1996 정보처리학회논문지 Vol.3 No.4
The magnetizer that is magnetizing the magnet which is used for RGB(Red Green Blue) control of CRT(Cathode-Ray Tube) and the magnet inspection unit which is used for test the state of magnetizing have been imported by magnet manufactures up to now. They are operation by manual now, so that they are needed lots of time and have an increase in probability of malefunction by operator. In this study, we have developed a united system from the magnet production process to inspection work to automaized a entire progress. Therefore, as we are testing the stats of every work and analyzing exactly the distribution in quality with this system, we have known that the reliability of magnetization and magnetized status test has not only increased, but the rate of inferior quality almost not generated.
A study on some variations of the k-d tree and BD tree for logical gates
Hah, ki jong,Choi, young gyu,Yi, cheon hee 청주대학교 산업과학연구소 1993 産業科學硏究 Vol.11 No.-
In this paper, a simple modification to the basic k-d tree structure is suggested to improve its performance for certain types of queries at the expense of slightly increased storage cost. Also present are some experimental results that compare the perfomance of the standard k-d tree and the modified k-d tree The k-d tree is one such example and it is a natural generalization of the standard one-dimensional binary search tree. Recently, a new storage structure, called the BD tree[1], was proposed to manage multidimensional data This structure has good dynamic characteristics, several variations are possible on the basic k-d tree structure This paper studies the performance implications of some variations. Further, it provides an empirical performance comparison of the k-d tree and BD tree in database applications.
Form of logical circuit by B-tree
Choi, young gyu,Hah, ki jong,Yi, cheon hee 청주대학교 산업과학연구소 1993 産業科學硏究 Vol.11 No.-
In the realm of parallel processing, many algorithms exist for the model of computation known as the tree machine which are quite amenable for implementation using VLSI technology. By changing the number and complexity of the processors used in the tree an algorithm is obtained which is optimal and flexible. Our solutions to these problems are all based on the concept of "on-the-fly" use of the input and intermediate result bits. For each problem, we present a solution in the form of a logical circuit for which the product of the computation time and the number of gates used is smaller than that of any previously known algorithm for the given problem that uses more than a constant number of processors