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구동 캐스터 바퀴를 이용한 전방향 모바일 로봇의 오도메트리와 내비게이션
정의정(Eui-jung Jung),이병주(Byung-Ju Yi) 제어로봇시스템학회 2009 제어·로봇·시스템학회 논문지 Vol.15 No.10
This work deals with navigation of an omni-directional mobile robot with active caster wheels. Initially, the posture of the omni-directional mobile robot is calculated by using the odometry information. Next, the position accuracy of the mobile robot is measured through comparison of the odometry information and the external sensor measurement. Finally, for successful navigation of the mobile robot, a motion planning algorithm that employs kinematic redundancy resolution method is proposed. Through experiments for multiple obstacles and multiple moving obstacles, the feasibility of the proposed navigation algorithm was verified.
CMOS 기술을 기반으로 제작된 정합 특성이 우수한 BJT 구조
정의정(Yi-Jung Jung),권혁민(Hyuk-Min Kwon),권성규(Sung-Kyu Kwon),장재형(Jae-Hyung Jang),곽호영(Ho-Young Kwak),이희덕(Hi-Deok Lee) 大韓電子工學會 2012 電子工學會論文誌-SD (Semiconductor and devices) Vol.49 No.5
본 논문에서는 CMOS 기반의 BJT 제작에 있어서 일반적인 BJT 구조에 비해 정합특성이 우수한 새로운 BJT 구조를 제안하고, 특성을 비교 분석하였다. 새로운 정합 구조가 기존의 정합 구조에 비해 콜렉터 전류 밀도 Jc는 0.361% 감소하였고, 전류이득 β는 0.166% 증가하여 큰 차이가 보이지 않았지만, 소자 면적이 10% 감소했으며, 콜렉터 전류(AIc)와 전류이득(Aβ)의 정합 특성이 각각 45.74%, 38.73% 향상되었다. 이와 같이 정합특성이 개선된 주 이유는 쌍으로 형성된 BJT 소자들의 에미터 간의 거리가 감소한 것이라고 생각되며, deep n-well 저항의 표준편차 값이 다른 저항들에 비해 큰 것으로부터 간접적으로 증명이 된다고 여겨진다. For CMOS based bipolar junction transistor (BJT), a novel BJT structure which has higher matching property than conventional BJT structure was proposed and analyzed. The proposed structure shows a slight decrease of collector current density, JC about 0.361% and an increase of current gain, β about 0.166% compared with the conventional structure. However, the proposed structure shows a decrease of area about 10% the improvement of matching characteristics of collector current (AIC) and current gain (Aβ) about 45.74% and 38.73% respectively. The improved matching characteristic of proposed structure is believed to be mainly due to the decreased distance between two emitters of pair BJTs, which results in the decreased effect of deep n-well of which resistance has the higher standard deviation than the other resistances.
MIM 구조를 갖는 Al<sub>2</sub>O<sub>3</sub>/HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub> 캐패시터의 정합특성 분석
장재형,권혁민,정의정,곽호영,권성규,이환희,고성용,이원묵,이성재,이희덕,Jang, Jae-Hyung,Kwon, Hyuk-Min,Jung, Yi-Jung,Kwak, Ho-Young,Kwon, Sung-Gyu,Lee, Hwan-Hee,Go, Sung-Yong,Lee, Weon-Mook,Lee, Song-Jae,Lee, Hi-Deok 한국전기전자재료학회 2012 전기전자재료학회논문지 Vol.25 No.1
In this paper, matching characteristic of MIM (metal-insulator-metal) capacitor with $Al_2O_3/HfO_2/Al_2O_3$ (AHA) structure is analyzed. The floating gate capacitance measurement technique (FGMT) was used for analysis of matching characteristic of the MIM capacitors in depth. It was shown that matching coefficient of AHA MIM capacitor is 0.331%${\mu}m$ which is appropriate for application to analog/RF integrated circuits. It was also shown that the matching coefficient has a more strong dependence on the width than length of MIM capacitor.
N형 Ge-on-Si 기판에 형성된 Pd Germanide의 열안정성 및 Schottky 장벽 분석
오세경,신홍식,강민호,복정득,정의정,권혁민,이가원,이희덕,Oh, Se-Kyung,Shin, Hong-Sik,Kang, Min-Ho,Bok, Jeong-Deuk,Jung, Yi-Jung,Kwon, Hyuk-Min,Lee, Ga-Won,Lee, Hi-Deok 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.4
In this paper, thermal stability of palladium germanide (Pd germanide) is analyzed for high performance Schottky barrier germanium metal oxide semiconductor field effect transistors (SB Ge-MOSFETs). Pd germanide Schottky barrier diodes were fabricated on n-type Ge-on-Si substrates and the formed Pd germanide shows thermal immunity up to $450^{\circ}C$. The barrier height of Pd germanide is also characterized using two methods. It is shown that Pd germanide contact has electron Schottky barrier height of 0.569~0.631 eV and work function of 4.699~4.761 eV, respectively. Pd germanide is promising for the nanoscale Schottky barrier Ge channel MOSFETs.
La이 혼입된 고유전체/메탈 게이트가 적용된 나노 스케일 NMOSFET에서의 PBTI 신뢰성의 특성 분석
권혁민,한인식,박상욱,복정득,정의정,곽호영,권성규,장재형,고성용,이원묵,이희덕,Kwon, Hyuk-Min,Han, In-Shik,Park, Sang-Uk,Bok, Jung-Deuk,Jung, Yi-Jung,Kwak, Ho-Young,Kwon, Sung-Kyu,Jang, Jae-Hyung,Go, Sung-Yong,Lee, Weon-Mook,Lee, Hi-De 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.3
In this paper, PBTI characteristics of NMOSFETs with La incorporated HfSiON and HfON are compared in detail. The charge trapping model shows that threshold voltage shift (${\Delta}V_{\mathrm{T}}$) of NMOSFETs with HfLaON is greater than that of HfLaSiON. PBTI lifetime of HfLaSiON is also greater than that of HfLaON by about 2~3 orders of magnitude. Therefore, high charge trapping rate of HfLaON can be explained by higher trap density than HfLaSiON. The different de-trapping behavior under recovery stress can be explained by the stable energy for U-trap model, which is related to trap energy level at zero electric field in high-k dielectric. The trap energy level of two devices at zero electric field, which is extracted using Frenkel-poole emission model, is 1,658 eV for HfLaSiON and 1,730 eV for HfLaON, respectively. Moreover, the optical phonon energy of HfLaON extracted from the thermally activated gate current is greater than that of HfLaSiON.
Strained-Si PMOSFET에서 디지털 및 아날로그 성능의 캐리어 방향성에 대한 의존성
한인식(In-Shik Han),복정득(Jung-Deuk Bok),권혁민(Hyuk-Min Kwon),박상욱(Sang-Uk Park),정의정(Yi-Jung Jung),신홍식(Hong-Sik Shin),양승동(Seung-Dong Yang),이가원(Ga-Won Lee),이희덕(Hi-Deok Lee) 大韓電子工學會 2010 電子工學會論文誌-SD (Semiconductor and devices) Vol.47 No.8
본 논문에서는 각각 다른 캐리어 방향성을 가지는 strained-silicon PMOSFET에서 소자의 디지털 및 아날로그 성능을 비교 평가 하였다. 캐리어 방향이 〈100〉을 갖는 소자의 경우 이동도 향상에 의해서 〈110〉방향의 소자 보다 우수한 드레인 구동 전류 및 출력저항 특성을 보이지만, NBTI 신뢰성과 소자의 matching 특성은 반대로 다소 열화 됨을 확인 하였다. 따라서 나노미터급 CMOSFET에서 캐리어 방향성을 이용한 이동도 향상 기술의 적용을 위해서는 DC 성능을 비롯한 신뢰성 및 아날로 그 특성을 모두 고려하는 것이 반드시 필요하다고 할 수 있다. In this paper, comparative analysis of digital and analog performances of strained-silicon PMOSFETs with different carrier direction were performed. ID.SAT vs. ID.OFF and output resistance, Rout performances of devices with 〈100〉 carrier direction were better than those of 〈110〉 direction due to the greater carrier mobility of 〈100〉 channel direction. However, on the contrary, NBTI reliability and device matching characteristics of device with 〈100〉 carrier direction were worse than those with 〈110〉 carrier direction. Therefore, simultaneous consideration of analog and reliability characteristics as well as DC device performance is highly necessary when developing mobility enhancement technology using the different carrier direction for nano-scale CMOSFETs.