http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
이승찬(S.-C. Lee),이덕규(D.-K. Lee),설영국(Y.-G. Seol),안종현(J.-H. Kim),이내응(N.-E. Lee),김윤제(Y.-J. Kim) 대한기계학회 2009 대한기계학회 춘추학술대회 Vol.2009 No.5
The Organic Thin Film Transistor (OTFT) on flexible substrate electroplated electrodes has many advantages in the fabrication of low cost sensors, e-paper, smart cards, and flexible displays. In this study, we simulated 3-D OTFT with various voltage conditions by using COMSOL commercial package. Analysis model was limited with channel, gate, source and drain for research of thermal distribution. The channel interval is 40 urn and the voltage ranged between -20 and -40V. The OTFT was fabricated using pentacene as a semiconducting layer and electroplated Ni as a gate electrode. Electric properties of fabricated OTFT were characterized by I-V measurements and heat flux was predicted with the result of thermal distribution.
Epitaxial thickness during low - temperature Si(001) growth : effect of substrate vicinality
이내응(N.-E. Lee) 한국진공학회(ASCT) 1999 Applied Science and Convergence Technology Vol.8 No.4(2)
초고진공 이온빔 스퍼터 장치를 이용하여 80~300℃의 기판온도 (T_s) 범위에서 실리콘 기판의 정상(001)면과 [100] 및 [110] 방향으로 기울어진 vicinal (001)면위에 성장된 실리콘 박막의 에피텍시 두께 t_e(T_s)를 측정하였다. vicinal 기판위에 성장된 실리콘 박막의 에피텍시 두께 t_e(T_s)가 정상 (001)면에 성장시킨 경우에 비교하여 감소하였다. 300℃의 기판온도에서 박막의 성장두께에 따른 표면조도의 변화를 atomic force microscopy을 이용하여 측정결과로 부터 vicinal 기판위의 증가된 step 밀도가 표면 조도를 증가시키어 불안정 성장 경향을 증대시키고 이것이 에피텍시 두께를 감소시키는 원인으로 작용하였음을 알 수 있었다. Epitaxial thickness t_e(T_s) of Si films grown at the substrate temperature T_s=80~300℃ by ultra-high vacuum ion-beam sputter deposition onto nominally-singular, [100]-, and [110]-miscut Si(001) was measured. t_e(T_s) values of films grown on vicinal Si(001) substrates were decreased compared to those of films grown on nominally-singular Si(001). Evolution of surface roughness measured by atomic force microscopy of films grown at 300℃ showed that the increased step density in vicinal substrates increases the tendency toward unstable growth resulting in larger surface roughness, which in turn decreases t_e.
B. S. Kwon,이내응,N.-E. Lee,S. K. Lee,Sung Wook Park 한국물리학회 2009 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.55 No.4
Resists are expected to play a key role in next-generation lithography, including EUVL (extreme ultraviolet lithography). In particular, the plasma etching characteristics of EUV resists need to be determined and compared with the etch characteristics of the current 193-nm ArF resist. In this study, the etch characteristics of ArF and EUV resists were compared in dualfrequency superimposed capacitively-coupled plasma (DFS-CCP) etcher systems using CF4/O2/Ar and CF4/CHF3/O2/Ar mixture gas chemistries, which are typically used to etch the bottom antireflective coating (BARC) and SiON hard-mask layer, respectively. The etch rate was faster in the CF4/O2/Ar plasma than in the CF4/CHF3/O2/Ar plasma. The etch rate of the ArF resist was higher than that of the EUV resist in both etch chemistries due to the different backbone structures of the EUV and the ArF resists. In general, the resist etch rates tend to increase with increasing low-frequency source power (PLF ) and high-frequency source frequency (fHF ) due to the increased ion bombardment and increased ion and radical flux, respectively.
저압화학증착을 이용한 실리콘-게르마늄 이종접합구조의 에피성장과 소자제작 기술 개발
심규환,김상훈,송영주,이내응,임정욱,강진영,Shim, K.H,Kim, S.H,Song, Y.J,Lee, N.E,Lim, J.W,Kang, J.Y 한국전기전자재료학회 2005 전기전자재료학회논문지 Vol.18 No.4
Reduced pressure chemical vapor deposition technology has been used to study SiGe heterostructure epitaxy and device issues, including SiGe relaxed buffers, proper control of Ge component and crystalline defects, two dimensional delta doping, and their influence on electrical properties of devices. From experiments, 2D profiles of B and P presented FWHM of 5 nm and 20 nm, respectively, and doses in 5×10/sup 11/ ∼ 3×10/sup 14/ ㎝/sup -2/ range. The results could be employed to fabricate SiGe/Si heterostructure field effect transistors with both Schottky contact and MOS structure for gate electrodes. I-V characteristics of 2D P-doped HFETs revealed normal behavior except the detrimental effect of crystalline defects created at SiGe/Si interfaces due to stress relaxation. On the contrary, sharp B-doping technology resulted in significant improvement in DC performance by 20-30 % in transconductance and short channel effect of SiGe HMOS. High peak concentration and mobility in 2D-doped SiGe heterostructures accompanied by remarkable improvements of electrical property illustrate feasible use for nano-sale FETs and integrated circuits for radio frequency wireless communication in particular.
유연성 유기 박막트랜지스터 적용을 위한 다층 게이트 절연막의 전기적 및 기계적 특성 향상 연구
노화영(H.Y. Noh),설영국(Y.G. Seol),김선일(S.I. Kim),이내응(N-E. Lee) 한국표면공학회 2008 한국표면공학회지 Vol.41 No.1
In this work, improvement of mechanical and electrical properties of gate dielectric layer for flexible organic thin film transistor (OTFT) devices was investigated. In order to increase the mechanical flexibility of PVP (poly(4-vinyl phenol) organic gate dielectric, a very thin inorganic HfO₂ layers with the thickness of 5-20 ㎚ was inserted in between the spin-coated PVP layers. Insertion of the inorganic HfO₂ in the laminated organic/ inorganic structure of PVP/HfO₂/PVP layer led to a dramatic reduction in the leakage current compared to the pure PVP layer. Under repetitive cyclic bending, the leakage current density of the laminated PVP/HfO₂/PVP layer with the thickness of 20-㎚ HfO₂ layer was not changed, while that of the single PVP layer was increased significantly. Mechanical flexibility tests of the OTFT devices by cyclic bending with 5 ㎜ bending radius indicated that the leakage current of the laminated PVP/HfO₂ (20 ㎚)/PVP gate dielectric in the device structure was also much smaller than that of the single PVP layer.