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Implementation of Cardiovascular Disease (CVD) Level Prediction Processor using Aptamer Biochip
Kyu-Yeul Wang,Sang-Seol Lee,Joo-Kyung Kim,Oh Hyuk Kwon,Ji-Yoon Kim,Byoung-Tak Zhang,Chong Ho Lee,Jeahyun Park,Duck-Jin Chung 대한전자공학회 2007 ITC-CSCC :International Technical Conference on Ci Vol.2007 No.7
In the developed country, cardiovascular disease (CVD) has considerably affected in a notice of death. In recent study, 40% of the disease mortality is related with CVD in the case of United States. Because of dangerousness of CVD, there is the growth of need that the method predicts whether some patient has CVD. To meet those need, there are so many efforts include our study. In our study, we propose the efficient diagnosis system to cover public people with cheap medical fee. The processor use aptamer biochip which is manufactured by Geno Prot Inc. to generate test pattern. This aptamer biochip is used for detection of specific protein included in patient’s serum. We can get abbreviated test set by using hypernetwork model. And then the processor generates CVD prediction results with the reduced data and only spends minimal processing time. The proposed CVD processor is verificated through Xilinx FPGA. The results show that the processor is well qualified as CVD diagonosis processor.
Design and Implementation of Combined Channel Codec over IEEE 802.15.4a UWB PHY(ITC-CSCC 2009)
Jae-Young Choi,Dong-Sun Kim,Kyu-Yeul Wang,Sang-Seol Lee,Jae-Yeon Song,Duck Jin Jung 대한전자공학회 2009 ITC-CSCC :International Technical Conference on Ci Vol.2009 No.7
In this paper, we present our implementation about the UWB PHY of IEEE 802.15.4a standard. It focuses on SECDED En/Decoder module for processing PHR Bits and RS En/Decoder module. They consist of two modules that operate independently of each other. We suggest that they process data bits through only RS En/Decoder module. RS En/Decoder module has PHR bits calculation together with RS operation. It also reduces the size of area because of processing PHR bits and RS data bits by using RS En/Decoder module register.