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A Study on the 80V BICMOS Device Fabrication Technology
박치선,차승익,최연익,정원영,박용,Park, Chi-Sun,Cha, Seung-Ik,Choi, Yearn-Ik,Jung, Won-Young,Park, Yong The Institute of Electronics and Information Engin 1991 전자공학회논문지-A Vol.28 No.10
In this paper, a BICMOS technology that has CMOS devices for digital application and bipolar devices for high voltage (80V) analog applications is presented. Basic concept to design BICMOS device is simple process technology without making too many performance trade-offs. The base line process is poly gate p-well CMOS process and three additional masking steps are added to improve bipolar characteristics. The key ingredients of bipolar integration are n+ buried layer process, up/down isolation process and p-well base process. The bipolar base region is formed simultaneously with the region of CMOS p-well area to reduce mask and heat cycle steps. As a result, hFE value of NPN bipolar transistor is 100-150(Ic=1mA). Collector resistance value is 138 ohm in case of bent type collector structure. Breakdown voltage of BVebo, BVcbo and BVceo are 21V, 115V and78V respectively. Threshold voltage is ${\pm}$1.0V for NMOS and PMOS transistor. Breakdown voltage of NMOS and PMOS transistor is obtained 22V and 19V respectively. 41 stage CMOS ring oscillator has 0.8ns delay time.
金顯昌,車承翼 成均館大學校 科學技術硏究所 1984 論文集 Vol.35 No.1
We have studied the low lying energy levels of ^182_74W by γ-ray detection with 89.4cc Ge(Li) detector. Those γ-rays are produced by β-decay of ^182_73Ta. Detected 1-ray energies are good agreement with those previously reported, but the relative intensities show a little difference, probably due to the error of wrong background estimation. In this measurement, 146, 1435 kev γ-ray energies are not observed. But observing of 1180, 1409 kev weak transitions we could confirm the 1510kev level.