SEM을 이용한 전자빔 Lithography 장치의 개발

정회환,정관수 慶熙大學校 材料科學技術硏究所 1988 材料科學技術硏究論集 Vol.1 No.-

An election beam direct exposure system for electron beam (EB) lithography employing a conventional scanning election microscope (SEM) was developed. The blanking for a non - exposure state was done by supplying an excess current to the condenser lens coil. Successive exposure of a square unit cell corresponding with a unit cell of bit-map CAD gave on IC pattern on a positive or negative type EB resist. An alignment method for direct writing using an electron - beam is described. The alignment mark corresponding to the unit square cell in the poly-Si layer. The alignment method consists of the coordinate axis. The marks are directly recognized by searching for the alignment marks on the CRT of SEM. NMOS IC test devices were fabricated on a Si wafer employing this alignment method.

최근의 지적재산권 동향과 특허정보

정회환(鄭會煥) 대한전기학회 1997 전기의 세계 Vol.46 No.5

인이 주입된 poly-Si/SiO$_{2}$/Si 기판에서 텅스텐 실리사이드의 형성에 관한연구

정회환,주병권,오명환,정관수 대한전자공학회 1996 전자공학회논문지-A Vol.33 No.3

Tungsten silicide films were deposited on the phosphorus-doped poly-Si/SiO$_{2}$/Si-substrates by LPCVD (low pressue chemical vapor deposition). The formation and various properties of tungsten silicide processed by furnace annealing in N$_{2}$ ambient were evaluated by using XRD. AFM, 4-point probe and SEM. And the redistribution of phosphorus atoms has been observed by SIMS. The crystal structure of the as-deposited tungsten silicide films were transformed from the hexagonal to the tetragonal structure upon annealing at 550.deg. C. The surface roughness of tungsten polycide films were found to very smoothly upon annelaing at 850.deg. C and low phosphorus concentration in polysilicon layer. The sheet resistance of tungsten polycide low phosphorus concentration in polysilicon layer. The sheet resistance of tungsten polycide films are measured to be 2.4 .ohm./ㅁafter furnace annealing at 1100.deg. C, 30min. It was found that the sheet resistance of tungsten polycide films upon annealing above 1050.deg. C were independant on the phosphorus concentration of polysilicon layer and furnace annealing times. An out-diffusion of phosphorus impurity through tungsten silicide film after annealing in $O_{2}$ ambient revealed a remarkably low content of dopant by oxide capping.

산화 분위기에 따른 게이트 산화막의 전기적 특성 분석 ( An Analysis of Electrical Characteristics of Gate Oxides by Oxidation Ambience )

정회환,김동식,정관수 대한전자공학회 1993 대한전자공학회 학술대회 Vol.1993 No.11

텅스텐 폴리사이드 전극에 따른 게이트 산화막의 내압 특성

정회환,이종현,정관수 대한전자공학회 1996 전자공학회논문지-A Vol.33 No.12

The breakdown characteristics of metal-oxide-semiconductor(MOS) capacitors fabricated by Al, polysilicon, and tungsten polycide gate electrodes onto gate oxide was evaluated by time zero dielectric breakdwon (TZDB). The average breakdown field of the gate oxide with tungsten polycide electride was lower than that of the polysilicon electrode. The B model (1~8MV/cm) failure of the gate oxide with tungsten polycide electrode was increased with increasing annealing temperature in the dry $O_{2}$ ambient. This is attributed ot fluorine and tungsten diffusion from thungsten silicide film into the gate oxide, and stress increase of tungsten polcide after annealing treatment.

건식 / 습식 산화막을 적용한 MOS 특성 개선

정회환,정관수 한국진공학회 1993 한국진공학회 학술발표회초록집 Vol.- No.-

비정질/다결정 실리콘 Gate를 이용한 Gate 산화막 특성 개선

정회환,정관수 慶熙大學校 材料科學技術硏究所 1992 材料科學技術硏究論集 Vol.5 No.-

The polysilicon films were deposited in a LPCVD furnace on oxidized substrates at temperatures above 620℃. The polysilicon gates were doped by a LPCVD furnace with POCl_(3) as the dopant gas. Dopant diffusion through the gate can lead to a degradation of the electrical properties. The interface properties have been characterized SIMS, ASR analysis. We have studied the breakdown properties of MOS fabricatied by depositing polysilicon on very thin(200Å) gate oxides grown by wet oxidation in a conventional furnace. The amorphous/poly silicon gates have higher breakdown field than the polysilicon gates.

W - Polycide 게이트 구조에서 텅스텐 실리사이드 증착 방법에 따른 게이트 산화막의 내압 특성

정회환(Hoi Hwan Chung),정관수(Kwan Soo Chung) 한국진공학회(ASCT) 1995 Applied Science and Convergence Technology Vol.4 No.3

습식 분위기로 성장한 게이트 산화막 위에 다결정 실리콘(poly-Si)과 텅스텐 폴리사이드 (WSi_x/poly-Si) 게이트 전극을 형성하여 제작한 금속-산화물-반도체(metal-oxide-semiconductor : MOS)의 전기적 특성을 순간 절연파괴(time zero dielectric breakdown : TZDB)로 평가하였다. 탱스텐 폴리사이드 게이트 전극에 따른 게이트 산화막의 평균 파괴전계는 다결정 실리콘 전극보다 1.93 MV/cm 정도 낮았다. 텅스텐 폴리사이드 게이트 전극에서 게이트 산화막의 B mode(1~8 MV/㎝) 불량률은 dry O₂ 분위기에서 열처리함으로써 증가하였다. 이것은 열처리함으로써 게이트 산화막에 불소 (fluorine)의 확산에 기인하였다. Dichlorosilane(SiH₂Cl₂) 환원에 의한 텅스텐 폴리사이드 게이트 전극이 silane(SiH₄)에 의한 것보다 B mode 불량률이 감소하였다. 그것은 dichlorosilane 환원에 의한 텅스텐 실리사이드내의 불소 농도가 silane에 의한 것보다 낮기 때문이다. The electrical characteristics of metal-oxide-semiconductor(MOS) fabricated by polysilicon and tungsten polycide(WSi_x/polysilicon) gate electrodes onto gate oxide grown by wet ambients were evaluated by time zero dielectric breakdown(TZDB). The average breakdown field of the gate oxides with tungsten polycide gate electrode was 1.93 MV/㎝ lower than that of the polysilicon gate electrode. The B mode(1~8 MV/㎝) failure of the gate oxides with tungsten polycide gate electrode was decreased by annealing in dry O₂ ambient. This is attributed to fluorine diffusion in the gate oxide by annealing. The B mode failure of the tungsten polycide gate electrode by dichlorosilane(SiH₂Cl₂) reduction was higher than that of the silane(SiH₄) reduction. It is found that the fluorine concentration in the tungsten silicide film by dichlorosilane was lower than that of the silane reduction.

텅스텐 폴리사이드막의 열산화에서 인 불순물 효과

정회환(Hoi Hwan Chung),정관수(Kwan Soo Chung) 한국진공학회(ASCT) 1995 Applied Science and Convergence Technology Vol.4 No.3

P-doped poly-Si/SiO₂/Si 기판위에 저압 화학 증착법(LPCVD)으로 증착한 텅스텐 실리사이드(WSi_2.7)막을 850℃에서 20분 동안 N₂ 분위기에서 열처리한 후에 건식 분위기에서 열산화하였다. 다결정 실리콘의 인도핑(doping) 레벨에 따른 텅스텐 폴리사이드(WSi_2.5/poly-Si)막의 산화 성장율과 텅스텐 폴리사이드막의 산화 메카니즘에 대하여 연구하였다. 텅스텐 폴리사이드막의 산화 성장율은 다결정 실리콘의 인(P) 도핑 레벨이 증가함에 따라 증가하였다. 텅스텐 폴리사이드막의 산화는 텅스텐 실리사이드층의 과잉(excess) Si가 초기 산화 과정 동안 소모된 후에 다결정 실리콘층의 Si가 소모되었다. 산화막과 산화막을 식각(etching)한 후에 텅스텐 실리사이드막의 표면 거칠기는 다결정 실리콘의 인 농도가 적을수록 평탄하였다. Tungsten silicide (WSi_2.7) films deposited by LPCVD (low pressure chemical vapor deposition) onto a P-doped polysilicon/SiO₂/Si substrate were oxidized in dry O₂ ambients after fumace annealing in N₂ at 850℃ for 20 min. The oxidation rate of the tungsten polycide (WSi_2.5/poly-Si) films as a function of phosphorus doping levels in the polysilicon and the oxidation mechanism of the tungsten polycide film have been studied. The oxidation rate of the tungsten polycide films increases with an increase of the phosphorus concentration in the polysilicon. The silicon from the underlying polysilicon layer begins to be consumed after all the excess silicon in the tungsten silicide layer is consumed first oxidation. The surface roughness of oxides and the tungsten silicide films after oxide etching was found to be very smooth at the low p-doped polysilicon.

비정질 실리콘을 이용한 다층 유전 박막의 전기적 특성에 관한 연구

정회환(Hoi Hwan Chung),정관수(Kwan Soo Chung) 한국진공학회(ASCT) 1994 Applied Science and Convergence Technology Vol.3 No.1

ANO 구조의 캐패시터 유전체막의 전기적인 특성을 ONO 구조의 캐패시터 유전체막의 경우와 비교하였다. ONO막과 ANO막의 전기적 특성은 고주파(1 ㎒) C-V, 정전압 stress 후 고주파 C-V, I-V, TDDB와 refresh time을 측정하여 평가하였다. ANO막이 ONO막보다 높은 절연파괴전하(Q_(BD))와 축적용량을 가졌고, 긴 refresh time을 가지는 우수한 전기적 특성을 나타냈다. 또한, ONO막과 ANO막과의 누설전류와 flat band 전압변화 (△V_(fb))에서도 거의 차이가 없었다. The electrical characteristics of the capacitor dielectric films of amorphous silicon-nitride-oxide(ANO) structures are compared with the capacitor dielectric films of oxide-nitride-oxide(ONO) structures. The electrical characteristics of ONO and ANO films were evaluated by high frequency(1 ㎒) C-V, high frequency C-V after constant voltage stress, I-V, TDDB, and refresh time measurements. ANO films shows good electrical characteristics such as higher total charge to breakdown(Q_(BD)), storage capacitance and longer refresh time than ONO films. Also, it makes little difference that leakage current and flat band voltage shift(△V_(fb)) of ANO and ONO films.