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드라이 에칭에 의한 손상에 Kaufman 이온원을 이용한 주소의 주입
왕진석(Jin Suk Wang) 대한공업교육학회 1985 대한공업교육학회지 Vol.10 No.2
It is shown that the damage created due to Ar ion beam etching can be removed by low energy hydrogen implantation wityout any heat treatment. Hydrogen implantation with beam energies ranging from 0.4 to 1.0 KeV were carried out for 15 min.
왕진석(Jin Suk Wang),조남인(Nam In Cho) 대한공업교육학회 1983 대한공업교육학회지 Vol.8 No.2
It is shown that efficient solar cells using oxide ZnO on single crystal silicon can be made by rf sputtering, The optical transparancy and ease of preparation of these films is excellent and the conductivity can easily be brought within the appropriate range of solar cell use by heat treatment in H₂. The transmission is typically 80 percent averaged over visible range. The open circuit voltage and fill factor is decreased, and the short circuit current is increased with increasing heat treatment temperature. The maximum conversion efficiency can be obtained when ZnO/Si device is heated at 350(℃) in H₂, 10 min and ZnO thickness is 5,000(Å).
소프트 에러율에 대한 박막 트랜지스터형 정적 RAM의 신뢰성
김도우,왕진석,Kim Do-Woo,Wang Jin-Suk 한국전기전자재료학회 2006 전기전자재료학회논문지 Vol.19 No.6
We investigated accelerated soft error rate (ASER) in static random access memory (SRAM) cells of thin film transistor (TFT) type. The effects on ASER by cell density, buried nwell structure, operational voltage, and polysilicon-2 layer thickness were examined. The increase in the operational voltage, and the decrease in the density of SRAM cells, respectively, resulted in the decrease of ASER values. The SRAM chips with buried nwell showed lower ASER than those with normal well structure did. The ASER decreased as the test distance from alpha source to the sample increased from $7{\mu}m\;to\;15{\mu}m$. As the polysilicon-2 thickness increased up to $1000\;{\AA}$, the ASER decreased exponentially. In conclusion, the best condition for low soft error rate, which is essential to obtain highly reliable SRAM device, is to apply the buried nwell structure scheme and to fabricate thin film transistors with the thick polysilicon-2 layer
As-Te-Si-Ge 유리질 반도체의 전기전도에 관한 연구
박창엽,왕진석,정홍배,Park, Chang-Yeub,Wang, Jin-Seok,Jeong, Hong-Bae 대한전자공학회 1975 전자공학회지 Vol.12 No.2
As-Te.Si-Ge 유리질 반도체의 직류 펀도도는 실온에서 3x10-7Ω-1cm-1∼1.5x10-8Ω-1cm-1이었고 각 시료의 온도 인화에 따른 전도특성은 상전이 온도(Tg) 이하에서 o=ooexp(-△E/kT)로 표시할 수 있었다. 또한 실온에서 각 시료의 교류 전도도의 주파수 의존도는 거의 같았으며 직류 전도도에 비해 상당치 높게 나타나서 o(w)=oo+Awn으로 표시할 수 있었다. 200KHz 경우에 교류 펀도도는 295。K∼473。K에서 온도에 무관하고 200Hz 경우에는 433。K에서 부터 심하게 증가하였다. 각 시fy는 기억스위칭 현상은 없었고 문지받스위칭 현상만 관찰할 수 있었다. The dc conductivity, ac conductivity and switching effect of As·Te-Si·Ge have beon investigated. The dc conductivity ranged from 3x10-7Ω-1cm-1∼1.5x10-8Ω-1cm-1 at room temperature and was found to be expressed by o=ooexp(-△E/kT) below the phase transition temperature Tg. The ac conductivity was much higher than dc conductivity and this result is consistent to experimental formula o(w)=oo+Awn. In the temperature range of 298。K∼147。K, the ac conductivity was independent of temperature at 200KHs. At lower frequencies the ac conductivity increased strong1y with temperature. Also, it has been found that all samples showed a threshold switching, but not a memory switching. The dc conductivity, ac conductivity and switching effect of As.Te-Si.Ge have beon investigated. The dc conductivity ranged from $3{\times}10^{-7}{\Omega}^{-1}cm^{-1}$ to $1.5{\times}10^{-8}{\Omega}^{-1}cm^{-1}$ at room temperature and was found to be expressed by ${\sigma}$ = ${\sigma}_0$exp(-${\Delta}$E/kT) below the phase transition temperature Tg. The ac conductivity was much higher than dc conductivity and this result is consistent to experimental formula ${\sigma}$(w)=${\sigma}_0+Aw^n$. In the temperature range of 298$^{\circ}K$ ~ $473^{\circ}K$ the ac conductivity was independent of temperature at 200KHs. At lower frequencies the ac conductivity increased strong1y with temperature. Also, it has been found that all samples showed a threshold switching, but not a memory switching.
$Sb_2O_3$첨가량에 의한 Barium-Titanates의 전기적 성질
박창엽,왕진석,김현재,Park, Chang-Yeop,Wang, Jin-Seok,Kim, Hyeon-Jae 대한전자공학회 1977 전자공학회지 Vol.14 No.1
공기중의 열처리에 의하여 상온에서 낮은 저항을 갖는 PTC 써미스터를 제작했다. 재현성을 높이기 위해 BaTiO3에 Al2O3, SiO2 및 TiO2를 첨가 했으며, 불순물로서 Sb2O3를 첨가했다. 시편은 공기 중에서 1,200℃∼1,380℃로서 가열되었으며, Sb2O3첨가량에 대한 저항관계를 조사했다. 이 시편들은 공기중의 열처리에서도 재현성이 좋았다. 연구된 시편은 3.75mole% Al2O3, 1.25mole% SiO2, 2.25mole% TiO2 및 0.16∼0.25wt% Sb2O3를 BaTiO3에 첨가하여 만들었으며 저항값은 14∼300ohm이었다. "Electrical Properties of Barium Titanates with Addition Sb2O3." PTC BaTiO3 in low resistance at room temperature was prepatred. Al2O3, SiO2 and TiO2 were doped with a view to improving reproduction. Sb2O3 was doped as impurity in order to control of resistivity of the specimens. The relations between the amount of Sb3O3 and electrical properties wereinvestigated. Of the compositions studied, additions of 3.75mole% Al2O3, 1.25mole% SiO2, 2.25mole% TiO2 and 0.16~0.25wt% Sb2O3 to BaTiC3 was low resistivity in 14-300 ohm-cm.00 ohm-cm.