다결정 실리콘 박막으로 구성된 Metal-Semiconductor-Metal 광검출기의 제조

이재성,최경근,Lee, Jae-Sung,Choi, Kyeong-Keun 한국전기전자재료학회 2017 전기전자재료학회논문지 Vol.30 No.5

A polysilicon-based metal-semiconductor-metal (MSM) photodetector was fabricated by means of our new methods. Its photoresponse characteristics were analyzed to see if it could be applied to a sensor system. The processes on which this study focused were an alloy-annealing process to form metal-polysilicon contacts, a post-annealing process for better light absorption of as-deposited polysilicon, and a passivation process for lowering defect density in polysilicon. When the alloy annealing was achieved at about $400^{\circ}C$, metal-polysilicon Schottky contacts sustained a stable potential barrier, decreasing the dark current. For better surface morphology of polysilicon, rapid thermal annealing (RTA) or furnace annealing at around $900^{\circ}C$ was suitable as a post-annealing process, because it supplied polysilicon layers with a smoother surface and a proper grain size for photon absorption. For the passivation of defects in polysilicon, hydrogen-ion implantation was chosen, because it is easy to implant hydrogen into the polysilicon. MSM photodetectors based on the suggested processes showed a higher sensitivity for photocurrent detection and a stable Schottky contact barrier to lower the dark current and are therefore applicable to sensor systems.

Method for improving electrical property of polysilicon film used to light absorption layer of photodetector

Lee Jae-Sung 한국물리학회 2022 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.80 No.7

In this study, various process methods were presented to improve the light response characteristics of polycrystalline silicon (polysilicon) for photodetector applications. The manufactured polysilicon is composed of grains and grain boundaries, and have a rectangular area for the light absorption. The dark current or photocurrent of a polysilicon-based photodetector is affected by the chemical state of the polysilicon grain and grain boundary where light absorption occurs. The electrical conductivity was investigated by varying the dimensions of the light absorption area to find the dependence of the number of grains in the absorption area. And then, we tried to find a way to control the conduction property of the polysilicon film through various subsequent processes. A good photodetector should show a large amount of photocurrent while keeping the dark current low. For this purpose, we found that an appropriate number of grains must be included in the area of the light absorption layer, and subsequent processes like thermal annealing or hydrogen ion implantation that can effectively passivate the dangling bonds of the grain boundary are required.

광검출기용 다결정 실리콘 박막의 전도특성 분석을 통한 결정립계의 모형화

이재성 한국전기전자재료학회 2020 전기전자재료학회논문지 Vol.33 No.4

Grain boundaries play a major role in determining device performance, particularly of polysilicon-based photodetectors. Through the post-annealing of as-deposited polysilicon and then, the analysis of electric behavior for a metal-polysilicon-metal (MSM) photodetector, we were able to identify the influence of grain boundaries. A modified model of polysilicon grain boundaries in the MSM structure is presented, which uses a crystalline-interfacial layer-SiOx layer- interfacial layer-crystalline system that is similar to the Si-SiO2 system in MOS device. Hydrogen passivation was achieved through a hydrogen ion implantation process and was used to passivate the defects at both interfacial layers. The thin SiOx layer at the grain boundary can enhance the photosensitivity of an MSM photodetector by decreasing the dark current and increasing the light absorption. 다결정 실리콘으로 구성된 광 검출기에서 소자의 성능은 결정립계(grain boundary)의 전도 특성에 의존하게 된다. 본 연구에서는 제조된 다결정 실리콘의 후속 공정에 따른 금속-다결정 실리콘-금속(MSM) 소자의 전기적 특성을 비교하여 결정립계의 영향을 조사하였다. 실험 결과를 통해 보완된 결정립계 모형인 Si 결정립/계면/SiOx 비정질/계면/Si 결정립 구조를 제안하였다. 이는 MOS 소자의 SiO2-Si 시스템과 유사하다. 두 계면은 수소 이온 주입공정을 통해 수소로 부동태화할 수 있었다. 결정립계에 존재하는 SiOx 비정질 박막은 MSM 광 검출기에서 암전류를 감소시키고, 광전류를 증가시키는 역할을 하게 되어 광응답 특성을 개선시키는 효과를 가져왔다.

고로슬래그와 폴리실리콘 슬러지를 활용한 무기결합재의 특성

임정근(Lim, Jeong-Geun),이상수(Lee, Sang-Soo) 대한건축학회 2015 大韓建築學會論文集 : 構造系 Vol.31 No.6

Recently, with development of the industry the globally Global warming is accelerating. Further, to the due depletion of natural resources, have been made many efforts to produce green energy. In particular, solar power generation industry has grown rapidly at an annual average rate of over 42%, the fastest rate. But, is generated sludge about 2tons in order to produce 1ton in the solar power generation used main material polysilicon. In this way, the arising sludge there is not method recycling and it is all discarded. Therefore, in the present study by the research on the properties of inorganic binder using the blast furnace slag and sludge seeks the polysilicon of the polysilicon sludge recycling methods. The experiment of the Series I was conducted in order to analyze the appropriate addition rate of the alkali activator. And the experiment of Series II was conducted in order to analyze the appropriate replacement ratio of the polysilicon sludge. The appropriate addition rate of the NaOH, that is the alkali activator, was exposed to be 7%. And the appropriate replacement ratio of the polysilicon sludge was exposed to be 8%.

Solar Module 용 그라파이트 척의 개발에 관한 연구

조인성 한국기계기술학회 2019 한국기계기술학회지 Vol.21 No.6

As the solar power generation system expands, researches on the development and production technology of solar modules are being actively conducted. In addition, in the production of polysilicon for solar modules, a high-purity carbon electrode is essential, which greatly affects the performance and productivity of the solar module. This research is about the development of a carbon electrode used to manufacture high-purity polysilicon rod, which is essential for the manufacture of the photovoltaic modules. Fine graphite chuck is used as a carbon electrode. Generally, it is a consumable material that is used once and discarded. Therefore, this study aimed to develop an assembly-type high purity graphite chuck that can recycle some resources to dramatically improve the utilization of resources. In order to maintain the purity and performance of polysilicon, the composition and performance of the graphite chuck are important. The fine graphite chuck is manufactured through the high-purification process after precision machining, and the performance is confirmed through the component analysis of the specimen. At about 5,000 nm or more from the surface, the compositions of the sample appeared almost constant, and a high purity sample satisfying the target specification was obtained. In addition, it was confirmed that the cost reduction could be achieved by designing the graphite electrode as a separable type, and the results of this study can be applied to the design of the fine graphite chuck for the production of high purity polysilicon.

소프트 에러율에 대한 박막 트랜지스터형 정적 RAM의 신뢰성

김도우,왕진석,Kim Do-Woo,Wang Jin-Suk 한국전기전자재료학회 2006 전기전자재료학회논문지 Vol.19 No.6

We investigated accelerated soft error rate (ASER) in static random access memory (SRAM) cells of thin film transistor (TFT) type. The effects on ASER by cell density, buried nwell structure, operational voltage, and polysilicon-2 layer thickness were examined. The increase in the operational voltage, and the decrease in the density of SRAM cells, respectively, resulted in the decrease of ASER values. The SRAM chips with buried nwell showed lower ASER than those with normal well structure did. The ASER decreased as the test distance from alpha source to the sample increased from $7{\mu}m\;to\;15{\mu}m$. As the polysilicon-2 thickness increased up to $1000\;{\AA}$, the ASER decreased exponentially. In conclusion, the best condition for low soft error rate, which is essential to obtain highly reliable SRAM device, is to apply the buried nwell structure scheme and to fabricate thin film transistors with the thick polysilicon-2 layer

Progress of High-k Dielectrics Applicable to SONOS-Type Nonvolatile Semiconductor Memories

Tang, Zhenjie,Liu, Zhiguo,Zhu, Xinhua The Korean Institute of Electrical and Electronic 2010 Transactions on Electrical and Electronic Material Vol.11 No.4

As a promising candidate to replace the conventional floating gate flash memories, polysilicon-oxide-nitride-oxidesilicon (SONOS)-type nonvolatile semiconductor memories have been investigated widely in the past several years. SONOS-type memories have some advantages over the conventional floating gate flash memories, such as lower operating voltage, excellent endurance and compatibility with standard complementary metal-oxide-semiconductor (CMOS) technology. However, their operating speed and date retention characteristics are still the bottlenecks to limit the applications of SONOS-type memories. Recently, various approaches have been used to make a trade-off between the operating speed and the date retention characteristics. Application of high-k dielectrics to SONOS-type memories is a predominant route. This article provides the state-of-the-art research progress of high-k dielectrics applicable to SONOS-type nonvolatile semiconductor memories. It begins with a short description of working mechanism of SONOS-type memories, and then deals with the materials' requirements of high-k dielectrics used for SONOS-type memories. In the following section, the microstructures of high-k dielectrics used as tunneling layers, charge trapping layers and blocking layers in SONOS-type memories, and their impacts on the memory behaviors are critically reviewed. The improvement of the memory characteristics by using multilayered structures, including multilayered tunneling layer or multilayered charge trapping layer are also discussed. Finally, this review is concluded with our perspectives towards the future researches on the high-k dielectrics applicable to SONOS-type nonvolatile semiconductor memories.

Progress of High-k Dielectrics Applicable to SONOS-Type Nonvolatile Semiconductor Memories

Zhenjie Tang,Zhiguo Liu,Xinhua Zhu 한국전기전자재료학회 2010 Transactions on Electrical and Electronic Material Vol.11 No.4

As a promising candidate to replace the conventional floating gate flash memories, polysilicon-oxide-nitride-oxidesilicon (SONOS)-type nonvolatile semiconductor memories have been investigated widely in the past several years. SONOS-type memories have some advantages over the conventional floating gate flash memories, such as lower operating voltage, excellent endurance and compatibility with standard complementary metal-oxide-semiconductor (CMOS) technology. However, their operating speed and date retention characteristics are still the bottlenecks to limit the applications of SONOS-type memories. Recently, various approaches have been used to make a trade-off between the operating speed and the date retention characteristics. Application of high-k dielectrics to SONOS-type memories is a predominant route. This article provides the state-of-the-art research progress of high-k dielectrics applicable to SONOS-type nonvolatile semiconductor memories. It begins with a short description of working mechanism of SONOS-type memories, and then deals with the material ’ requirements of high-k dielectrics used for SONOS-type memories. In the following section, the microstructures of high-k dielectrics used as tunneling layers, charge trapping layers and blocking layers in SONOS-type memories, and their impacts on the memory behaviors are critically reviewed. The improvement of the memory characteristics by using multilayered structures, including multilayered tunneling layer or multilayered charge trapping layer are also discussed. Finally, this review is concluded with our perspectives towards the future researches on the high-k dielectrics applicable to SONOS-type nonvolatile semiconductor memories.

ISDG를 이용한 다결정실리콘의 기계적 물성값 측정법

오충석(Chung-Seog Oh),William. N. Sharpe Jr. Korean Society for Precision Engineering 2004 한국정밀공학회지 Vol.21 No.7

Techniques and procedures are presented for measuring mechanical properties on thin-film polysilicon. Narrow platinum lines are deposited 250 ㎛ apart on tensile specimens that are 3.5 ㎛ thick and 600 urn wide. Load is applied by a piezo-actuator and by hanging weights. Strain is measured by an ISDG at temperatures up to 500℃. Measurements of the elastic modulus with jig modifications, loading speed and temperature change are presented first. And then, the preliminary data for the coefficient of thermal expansion and creep behavior are presented as a reference.

Effect of Native Oxide on Polycrystalline Silicon CMP

Woonki Shin,Hanchul Cho,Hojun Lee,정해도 한국물리학회 2009 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.54 No.3

The polycrystalline silicon Chemical Mechanical Polishing process is performed by using a hybrid chemical reaction and mechanical abrasion. A native oxide on the polysilicon surface was found to have affected the CMP results. This paper describes the effect of the native oxide on polysilicon CMP and the variation in the polishing characteristics with the concentration of the alkaline agent (potassium hydroxide, KOH). During CMP, the high-frequency friction force was simultaneously measured by using a CMP monitoring system to understand the polysilicon CMP characteristics. The result showed that the removal rate of polysilicon increased with the alkaline agent concentra- tion. However, the analyzed data from the CMP monitoring system showed that the initial friction signal had transition region during polysilicon polishing, resulting from the native oxide. To remove the native oxide on polysilicon, the authors performed a BOE (buffered oxide etch) treatment. After the native oxide on Polysilicon had been removed, the transition region was no longer found and higher material removal could be achieved. Consequently, we found that the removal of polysilicon was restricted by the native oxide, which was influenced by the alkaline agent. The polycrystalline silicon Chemical Mechanical Polishing process is performed by using a hybrid chemical reaction and mechanical abrasion. A native oxide on the polysilicon surface was found to have affected the CMP results. This paper describes the effect of the native oxide on polysilicon CMP and the variation in the polishing characteristics with the concentration of the alkaline agent (potassium hydroxide, KOH). During CMP, the high-frequency friction force was simultaneously measured by using a CMP monitoring system to understand the polysilicon CMP characteristics. The result showed that the removal rate of polysilicon increased with the alkaline agent concentra- tion. However, the analyzed data from the CMP monitoring system showed that the initial friction signal had transition region during polysilicon polishing, resulting from the native oxide. To remove the native oxide on polysilicon, the authors performed a BOE (buffered oxide etch) treatment. After the native oxide on Polysilicon had been removed, the transition region was no longer found and higher material removal could be achieved. Consequently, we found that the removal of polysilicon was restricted by the native oxide, which was influenced by the alkaline agent.