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Growth of AlN/GaN HEMT structure Using Indium-surfactant
Kim, Jeong-Gil,Won, Chul-Ho,Kim, Do-Kywn,Jo, Young-Woo,Lee, Jun-Hyeok,Kim, Yong-Tae,Cristoloveanu, Sorin,Lee, Jung-Hee The Institute of Electronics and Information Engin 2015 Journal of semiconductor technology and science Vol.15 No.5
We have grown AlN/GaN heterostructure which is a promising candidate for mm-wave applications. For the growth of the high quality very thin AlN barrier, indium was introduced as a surfactant at the growth temperature varied from 750 to $1070^{\circ}C$, which results in improving electrical properties of two-dimensional electron gas (2DEG). The heterostructure with barrier thickness of 7 nm grown at of $800^{\circ}C$ exhibited best Hall measurement results; such as sheet resistance of $215{\Omega}/{\Box}$electron mobility of $1430cm^2/V{\cdot}s$, and two-dimensional electron gas (2DEG) density of $2.04{\times}10^{13}/cm^2$. The high electron mobility transistor (HEMT) was fabricated on the grown heterostructure. The device with gate length of $0.2{\mu}m$ exhibited excellent DC and RF performances; such as maximum drain current of 937 mA/mm, maximum transconductance of 269 mS/mm, current gain cut-off frequency of 40 GHz, and maximum oscillation frequency of 80 GHz.
Kim, Do-Kywn,Sindhuri, V.,Kim, Dong-Seok,Jo, Young-Woo,Kang, Hee-Sung,Jang, Young-In,Kang, In Man,Bae, Youngho,Hahm, Sung-Ho,Lee, Jung-Hee The Institute of Electronics and Information Engin 2014 Journal of semiconductor technology and science Vol.14 No.5
In this paper, we have characterized the electrical properties related to gate leakage current in AlGaN/GaN MISHFETs with varying the thickness (0 to 10 nm) of $Al_2O_3$ gate insulator which also serves as a surface protection layer during high-temperature RTP. The sheet resistance of the unprotected TLM pattern after RTP was rapidly increased to $1323{\Omega}/{\square}$ from the value of $400{\Omega}/{\square}$ of the as-grown sample due to thermal damage during high temperature RTP. On the other hand, the sheet resistances of the TLM pattern protected with thin $Al_2O_3$ layer (when its thickness is larger than 5 nm) were slightly decreased after high-temperature RTP since the deposited $Al_2O_3$ layer effectively neutralizes the acceptor-like states on the surface of AlGaN layer which in turn increases the 2DEG density. AlGaN/GaN MISHFET with 8 nm-thick $Al_2O_3$ gate insulator exhibited extremely low gate leakage current of $10^{-9}A/mm$, which led to superior device performances such as a very low subthreshold swing (SS) of 80 mV/dec and high $I_{on}/I_{off}$ ratio of ${\sim}10^{10}$. The PF emission and FN tunneling models were used to characterize the gate leakage currents of the devices. The device with 5 nm-thick $Al_2O_3$ layer exhibited both PF emission and FN tunneling at relatively lower gate voltages compared to that with 8 nm-thick $Al_2O_3$ layer due to thinner $Al_2O_3$ layer, as expected. The device with 10 nm-thick $Al_2O_3$ layer, however, showed very high gate leakage current of $5.5{\times}10^{-4}A/mm$ due to poly-crystallization of the $Al_2O_3$ layer during the high-temperature RTP, which led to very poor performances.
Device Performances Related to Gate Leakage Current in Al₂O₃/AlGaN/GaN MISHFETs
Do-Kywn Kim,V.Sindhuri,Dong-Seok Kim,Young-Woo Jo,Hee-Sung Kang,Young-In Jang,In Man Kang,Youngho Bae,Sung-Ho Hahm,Jung-Hee Lee 대한전자공학회 2014 Journal of semiconductor technology and science Vol.14 No.5
In this paper, we have characterized the electrical properties related to gate leakage current in AlGaN/GaN MISHFETs with varying the thickness (0 to 10 nm) of Al₂O₃ gate insulator which also serves as a surface protection layer during high-temperature RTP. The sheet resistance of the unprotected TLM pattern after RTP was rapidly increased to 1323 Ω/□ from the value of 400 Ω/□ of the as-grown sample due to thermal damage during high temperature RTP. On the other hand, the sheet resistances of the TLM pattern protected with thin Al₂O₃ layer (when its thickness is larger than 5 nm) were slightly decreased after high-temperature RTP since the deposited Al₂O₃ layer effectively neutralizes the acceptor-like states on the surface of AlGaN layer which in turn increases the 2DEG density. AlGaN/GaN MISHFET with 8 nmthick Al₂O₃ gate insulator exhibited extremely low gate leakage current of 10<SUP>-9</SUP> A/mm, which led to superior device performances such as a very low subthreshold swing (SS) of 80 mV/dec and high Ion/Ioff ratio of ~ 1010. The PF emission and FN tunneling models were used to characterize the gate leakage currents of the devices. The device with 5 nm-thick Al₂O₃ layer exhibited both PF emission and FN tunneling at relatively lower gate voltages compared to that with 8 nm-thick Al₂O₃ layer due to thinner Al₂O₃ layer, as expected. The device with 10 nm-thick Al₂O₃ layer, however, showed very high gate leakage current of 5.5 ×10<SUP>-4</SUP> A/mm due to poly-crystallization of the Al₂O₃ layer during the high-temperature RTP, which led to very poor performances.
Growth of AlN/GaN HEMT structure Using Indium-surfactant
Jeong-Gil Kim,Chul-Ho Won,Do-Kywn Kim,Young-Woo Jo,Jun-Hyeok Lee,Yong-Tae Kim,Sorin Cristoloveanu,Jung-Hee Lee 대한전자공학회 2015 Journal of semiconductor technology and science Vol.15 No.5
We have grown AlN/GaN heterostructure which is a promising candidate for mm-wave applications. For the growth of the high quality very thin AlN barrier, indium was introduced as a surfactant at the growth temperature varied from 750 to 1070 ℃, which results in improving electrical properties of two-dimensional electron gas (2DEG). The heterostructure with barrier thickness of 7 ㎚ grown at of 800 ℃ exhibited best Hall measurement results; such as sheet resistance of 215 Ω/□, electron mobility of 1430 ㎠/V·s, and two-dimensional electron gas (2DEG) density of 2.04 x 10<SUP>13</SUP> /㎠. The high electron mobility transistor (HEMT) was fabricated on the grown heterostructure. The device with gate length of 0.2 ㎛ exhibited excellent DC and RF performances; such as maximum drain current of 937 ㎃/㎜, maximum transconductance of 269 mS/㎜, current gain cut-off frequency of 40 ㎓, and maximum oscillation frequency of 80 ㎓.
화합물-실리콘 이종 반도체 융합 공정에 따른 실리콘 웨이퍼 뒷면 비소 오염 최소화 연구
임성규(Sung-Kyu Lim),김도균(Do-Kywn Kim),황해철(Hae-Chul Hwang),김진수(Jin-Su Kim),신찬수(Chan-Soo Shin),이희덕(Hi-Deok Lee),김대현(Dae-Hyun Kim) 대한전자공학회 2016 대한전자공학회 학술대회 Vol.2016 No.6
In this paper, we have investigated a pathway to mitigate the arsenic (As) cross-contamination on a back side Si wafer during GaAs growth by metal-organic chemical vapour deposition (MOCVD). Without a proper protocol doing a III-V on Si heterogeneous epitaxy, We have observed high levels of the As concentration on the back side Si wafer, easily in excess of 1 × 10<SUP>20</SUP> atoms/㎤ by secondary ion mass spectrometry (SIMS) analysis and 10<SUP>15</SUP> atoms/㎠ by total reflection X-ray fluorescence (TXRF) analysis, after GaAs growth on Si. This known level of contamination on wafers would disqualify them for fabrication in existing Si VLSI FABs. In order to mitigate the As cross-contamination, we have proposed a SiO2 protection layer on the back side of the Si wafer. From both SIMS and TXRF analysis, the proposed scheme has dramatically lowered the back side as concentration to 1.5 × 10<SUP>16</SUP> atoms/㎤ by SIMS and 1.0 × 10<SUP>10</SUP> atoms/㎠ by TXRF.
Young-Wun Kim,Do-Huak Hwang,Tae-Kywn Yang,K. Chung,W.-O. Cho 한국트라이볼로지학회 2005 한국트라이볼로지학회 학술대회 Vol.2005 No.6
A series of oleic acid esters containing mercaptobenzothiazole and dialkylenedithiocarbamate, which are potential environmentally friendly lubricating grease additives, were synthesized. The tribological properties as lubricating additives in 100N BO, vegetable oil, and Li-soap greases were evaluated using a 4-ball tester and SRV tester. As the results of 4-ball WSD in 100N BO, 4-ball property of oleic acid ester with mercaptobenzothiazole groups possess better antiwear performance than that of the other esters with dialkylenedithiocarbamate. Also, SRV EP characteristics of the synthesized esters in Li-soap grease showed better than that of Mo-DTC.
Jeon, Dae-Young,Kim, Do-Kywn,Park, So Jeong,Koh, Yumin,Cho, Chu-Young,Kim, Gyu-Tae,Park, Kyung-Ho Elsevier 2018 MICROELECTRONIC ENGINEERING Vol.199 No.-
<P><B>Abstract</B></P> <P>The AlGaN/GaN high electron mobility transistor (HEMT) is considered a promising device for high-power, high-frequency, and high-temperature applications, as well as high-sensitivity sensors. However, several issues related to mobility, interface properties, and series resistance need to be clarified for a better understanding of the physical operation of AlGaN/GaN HEMTs and for further optimization of their performance. In this work, the electrical properties of AlGaN/GaN HEMTs, including the effects of series resistance, and interface properties with mobility degradation factors were investigated in detail. In addition, the low-frequency noise behavior of AlGaN/GaN HEMTs was examined with a carrier number fluctuation model that considered series resistance effects.</P> <P><B>Highlights</B></P> <P> <UL> <LI> Electrical characteristics of AlGaN/GaN HEMTs with several parameters were investigated in detail. </LI> <LI> Series resistance (R<SUB>sd</SUB>) effect significantly causing degradation of effective mobility was de-embedded. </LI> <LI> Gate-to-channel capacitance (C<SUB>gc</SUB>) was obtained with eliminating the parasitic offset capacitance. </LI> <LI> Mobility degradation factors were discussed with interface quality issues. </LI> <LI> Carrier number fluctuation model with considering R<SUB>sd</SUB> effects explained well 1/f noise behavior of AlGaN/GaN HEMTs. </LI> </UL> </P> <P><B>Graphical abstract</B></P> <P>[DISPLAY OMISSION]</P>
A New Unified Mobility Extraction Technique of In<sub>0.7</sub>Ga<sub>0.3</sub>As QW MOSFETs
Park, Jung Ho,Kim, Do-Kywn,Son, Seung-Woo,Shin, Seung Heon,Kim, Tae-Woo,Lee, Jung-Hee,Kim, Dae-Hyun IEEE 2016 IEEE electron device letters Vol.37 No.9
<P>Conventional methods to extract an effective mobility ( <TEX>$\mu _{\mathrm {eff}}$</TEX>) in a metal–oxide–semiconductor field-effect-transistor (MOSFET) tend to ignore the portions of parasitic components of the device. This can cause a substantial error in the extracted value of the effective mobility. In this letter, we have proposed a unified procedure that enables to accurately capture each portion of parasitic series resistance ( <TEX>$R_{{\mathrm {SD}}}$</TEX>) and parasitic gate capacitance ( <TEX>$C_{g\_{}{\mathrm {par}}}$</TEX>) components. Then, we have investigated the impact of the parasitic components on the extracted value of the effective mobility in a gate-last surface-channel In<SUB>0.7</SUB>Ga<SUB>0.3</SUB>As quantum-well MOSFET. We have found that the extracted effective mobility using our method turns out to be independent upon gate length ( <TEX>$L_{{\mathrm {g}}}$</TEX>) from 10 to <TEX>$4~\mu \text{m}$</TEX>, which verifies the accuracy of the approach proposed in this letter.</P>