http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
Post Resonator 방법에 의한 마이크로파 유전율 측정에서의 오차 분석
조문성,임동건,박재환,박재관,Cho, Mun-Seong,Lim, Donggun,Park, Jae-Hwan,Park, Jae-Gwan 한국마이크로전자및패키징학회 2012 마이크로전자 및 패키징학회지 Vol.19 No.3
마이크로파 유전체의 비유전율 측정에 널리 사용되고 있는 post resonator 기법에서 시편의 형상과 기구물의 편차 등에 의해서 발생하는 비유전율 계산의 오차요인에 대해 시뮬레이션과 시편 실측을 통해 분석하였다. HFSS 시뮬레이션을 통하여 post resonator 측정 기구물에 놓여진 유전체(유전율 38) 디스크의 $S_{21}$ 파라메터 스펙트럼을 계산하고 $TE_{011}$ 모드 공진주파수로부터 비유전율을 계산하였다. 시편의 형상비(직경D/높이H)가 0.8~1.6 사이로 변화함에 따라 계산되는 비유전율 값의 오차는 약 0.3% 이내로 미미하였다. 시편과 상하부 도체 사이에 1~10% 정도의 공극이 존재할 경우, 비유 전율은 1~10% 정도의 높은 수준으로 오차가 발생하였다. 시편이 중심부에서 벗어나서 위치하는 것은 비유전율 측정에 오차를 유발하지 않았다. 이러한 시뮬레이션 결과는 제작 샘플의 실제 측정을 통해 유사한 경향성을 확인하였다. Errors of relative permittivity calculation caused by the variation of sample aspect ratio (diameter/height) and measuring geometry were analyzed by computer simulation and measurement. Firstly, the $S_{21}$ spectrum of the sample (permittivity 38) was simulated in the post resonator measuring apparatus by HFSS simulation. Then, the relative permittivity was calculated from the $TE_{011}$ mode resonant frequency. The relative permittivity varied by ca. 0.3% with sample aspect ratio variation (D/H=0.8~1.6). The relative permittivity varied by ca. 1~10% when the 1~10% of air-gap was introduced in between the dielectric disk and upper conductor. All the simulation results showed consistent tendency with real measurement.
광유도 전해 도금법을 이용한 결정질 실리콘 태양전지용 Ni/Cu 전극 형성
홍혜권,박정은,조영호,김동식,임동건,송우창,Hong, Hyekwon,Park, Jeongeun,Cho, Youngho,Kim, Dongsik,Lim, Donggun,Song, Woochang 한국교통대학교 융복합기술연구소 2018 융ㆍ복합기술연구소 논문집 Vol.8 No.1
The screen printing method for forming the electrode by applying the existing pressure is difficult to apply to thin wafers, and since expensive Ag paste is used, it is difficult to solve the problem of cost reduction. This can solve both of the problems by forming the front electrode using a plating method applicable to a thin wafer. In this paper, the process conditions of electrode formation are optimized by using LIEP (Light-Induced Electrode Plating). Experiments were conducted by varying the Ni plating bath temperature $40{\sim}70^{\circ}C$, the applied current 5 ~ 15 mA, and the plating process time 5 ~ 20 min. As a result of the experiment, it was confirmed that the optimal condition of the structural characteristics was obtained at the plating bath temperature of $60^{\circ}C$, 15 mA, and the process time of 20 min. The Cu LIEP process conditions, experiments were conducted with Cu plating bath temperature $40{\sim}70^{\circ}C$, applied voltage 5 ~ 15 V, plating process time 2 ~ 15 min. As a result of the experiment, it was confirmed that the optimum conditions were obtained as a result of electrical and structural characteristics at the plating bath temperature of $60^{\circ}C$ and applied current of 15 V and process time of 15 min. In order to form Ni silicide, the firing process time was fixed to 2 min and the temperature was changed to $310^{\circ}C$, $330^{\circ}C$, $350^{\circ}C$, and post contact annealing was performed. As a result, the lowest contact resistance value of $2.76{\Omega}$ was obtained at the firing temperature of $310^{\circ}C$. The contact resistivity of $1.07m{\Omega}cm^2$ can be calculated from the conditionally optimized sample. With the plating method using Ni / Cu, the efficiency of the solar cell can be expected to increase due to the increase of the electric conductivity and the decrease of the resistance component in the production of the solar cell, and the application to the thin wafer can be expected.
스핀 도핑을 이용한 단결정 실리콘 태양전지 확산 공정 최적화
여인환,박주억,김준희,조해성,임동건,Yeo, In Hwan,Park, Ju Eok,Kim, Jun Hee,Cho, Hae Sung,Lim, Donggun 한국전기전자재료학회 2013 전기전자재료학회논문지 Vol.26 No.5
Rapid thermal processing (RTP) abruptly decreases the time required to perform solar cell processes. RTP were used to form emitter of crystalline silicon solar cells. The emitter sheet resistance is studied as a function of time and temperature. The objective of this study is reduction of doping process time with same performance. Emitter difRapid thermal dfusion was carried out by using a spin on doping and a RTP. iffusion was performed in the temperature range of $700{\sim}750^{\circ}C$ for 1m 30s~15 m. Thermal budgets yielded a $50{\Omega}/sq$ emitter using a P509 source. To reduce process time and get high efficiency, rapid thermal diffusion by IR lamp was employed in air atmosphere at $700^{\circ}C$ for 15 m.
알카리 식각과 반응성 이온 식각을 이용한 결정질 실리콘 2단계 표면 조직화 공정
여인환,박주억,김준희,조해성,임동건,Yeo, In Hwan,Park, Ju Eok,Kim, Jun Hee,Cho, Hae Sung,Lim, Donggun 한국전기전자재료학회 2013 전기전자재료학회논문지 Vol.26 No.2
Lowering surface reflectance of silicon wafer by texturization is one of the most important processes to improve the efficiency of silicon solar cells. Generally, the texturing of crystalline silicon was carried out using alkaline solution. The average reflectance of this method was 11% at the wavelength between 400 and 1,000 nm. In this study, the wafers were first texturing by NaOH solution at $80^{\circ}C$ for 35 min. Then the wafers were texturing by $SF_6$ and $O_2$ plasma in RIE (Reactive Ion Etching). The average reflectance of two step texturing was reduced to below 5% at the wavelength between 400 and 1,000 nm.
화학습식공정법을 이용한 용액 농도 및 시간에 따른 ZnS 완충층 특성에 대한 분석
손경태,김종완,김민영,신준철,조성희,임동건,Son, Kyeongtae,Kim, Jongwan,Kim, Minyoung,Shin, Junchul,Jo, Sunghee,Lim, Donggun 한국전기전자재료학회 2014 전기전자재료학회논문지 Vol.27 No.5
In this study, chemical bath deposition method was used to grow Zinc sulfide(ZnS) thin films from $NH_3/SC(NH_2)_2/ZnSO_4$ solutions at $90^{\circ}C$. ZnS thin films have been prepared onto ITO glass. The concentrations of $ZnSO_4$ and $NH_3$ were varied while the concentration of Thiourea was fixed in 0.52 M. Structural, optical, electrical characteristic of ZnS thin films were measured. The physical and optical properties of different ZnS thin films were influenced severely by the concentration of the two reacting chemicals. The optimal concentration of $ZnSO_4$ and $NH_3$ was 0.085 M and 1.6 M, respectively.
결정질 실리콘 태양전지의 전극 종횡비 개선과 전극 간 간격이 효율에 미치는 영향 분석
김민영,박주억,조해성,김대성,변성균,임동건,Kim, Min Young,Park, Ju-Eok,Cho, Hae Sung,Kim, Dae Sung,Byeo, Seong Kyun,Lim, Donggun 한국전기전자재료학회 2014 전기전자재료학회논문지 Vol.27 No.4
The screen printed technique is one of the electrode forming technologies for crystalline silicon solar cell. It has the advantage that can raise the production efficiency due to simple process. The electrode technology is the core process because the electrode feature is given a substantial factor (for solar cell efficiency). In this paper, we tried to change conditions such as squeegee angle $55{\sim}75^{\circ}$, snap off 0.5~1.75 mm, printing pressure 0.6~0.3 MPa and 1.6~2.0 mm finger spacing. As a result, the screen printing process showed an improved performance with an increased height higher finger height. Optimization of fabrication process has achieved 17.48% efficiency at screen mesh of 1.6 mm finger spacing.