http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
- 中文 을 입력하시려면 zhongwen을 입력하시고 space를누르시면됩니다.
- 北京 을 입력하시려면 beijing을 입력하시고 space를 누르시면 됩니다.
RISS 인기검색어
- 검색키워드
- 저자 : 도승우(Seung-Woo Do) (검색결과 5 건)
- 무료
- 기관 내 무료
- 유료
-
HfO₂ MIM capacitor의 하부 금속에 따른 전기적 특성 변화
도승우(Seung-Woo Do),배군호(Kun-Ho Bae),이재성(Jae-Sung Lee),이용현(Yong-Hyun Lee) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.7
In this study, on the various metal electrodes a high-k dielectrics, HfO₂, thin film was deposited by reactive RF-magnetron sputtering method for the application of Metal-Insulator-Metal (MIM) capacitors. The metals, such as RuO₂, Pt, W, TiN and poly-Si were used as a bottom electrodes and AI as a top electrode. The characteristics of capacitance and leakage current depend on the interface properties between HfO₂ and the bottom electrode. Among the metals, Pt and W were g∞d candidates for a bottom electrode in the metal-HfO₂-metal structure.
-
중수소 이온 주입에 의한 MOS 커패시터의 게이트 산화막 절연 특성 개선
서영호,도승우,이용현,이재성,Seo, Young-Ho,Do, Seung-Woo,Lee, Yong-Hyun,Lee, Jae-Sung 한국전기전자재료학회 2011 전기전자재료학회논문지 Vol.24 No.8
This paper is studied for the improvement of the characteristics of gate oxide with 3-nm-thick gate oxide by deuterium ion implantation methode. Deuterium ions were implanted to account for the topography of the overlaying layers and placing the D peak at the top of gate oxide. A short anneal at forming gas to nitrogen was performed to remove the damage of D-implantation. We simulated the deuterium ion implantation to find the optimum condition by SRIM (stopping and range of ions in matter) tool. We got the optimum condition by the results of simulation. We compare the electrical characteristics of the optimum condition with others terms. We also analyzed the electrical characteristics to change the annealing conditions after deuterium ion implantation. The results of the analysis, the breakdown time of the gate oxide was prolonged in the optimum condition. And a variety of annealing, we realized the dielectric property that annealing is good at longer time. However, the high temperature is bad because of thermal stress.
-
HfO<sub>2</sub>/Hf/Si MOS 구조에서 나타나는 HfO<sub>2</sub> 박막의 물성 및 전기적 특성
배군호,도승우,이재성,이용현,Bae, Kun-Ho,Do, Seung-Woo,Lee, Jae-Sung,Lee, Yong-Hyun 한국전기전자재료학회 2009 전기전자재료학회논문지 Vol.22 No.2
In this paper, Thin films of $HfO_2$/Hf were deposited on p-type wafer by Atomic Layer Deposition (ALD). We studied the electrical and material characteristics of $HfO_2$/Hf/Si MOS capacitor depending on thickness of Hf metal layer. $HfO_2$ films were deposited using TEMAH and $O_3$ at $350^{\circ}C$. Samples were then annealed using furnace heating to $500^{\circ}C$. Round-type MOS capacitors have been fabricated on Si substrates with $2000\;{\AA}$-thick Pt top electrodes. The composition rate of the dielectric material was analyzed using TEM (Transmission Electron Microscopy), XRD (X-ray Diffraction) and XPS (X-ray Photoelectron Spectroscopy). Also the capacitance-voltage (C-V), conductance-voltage (G-V), and current-voltage (I-V) characteristics were measured. We calculated the density of oxide trap charges and interface trap charges in our MOS device. At the interface between $HfO_2$ and Si, both Hf-Si and Hf-Si-O bonds were observed, instead of Si-O bond. The sandwiched Hf metal layer suppressed the growing of $SiO_x$ layer so that $HfSi_xO_y$ layer was achieved. And finally, the generation of both oxide trap charge and interface trap charge in $HfO_2$ film was reduced effectively by using Hf metal layer.
-
수소 및 중수소가 포함된 실리콘 산화막의 전기적 스트레스에 의한 열화특성
이재성,백종무,정영철,도승우,이용현,Lee, Jae-sung,Back, Jong-mu,Jung, Young-chul,Do, Seung-woo,Lee, Yong-hyun 한국전기전자재료학회 2005 전기전자재료학회논문지 Vol.18 No.11
Experimental results are presented for the degradation of 3 nm-thick gate oxide $(SiO_2)$ under both Negative-bias Temperature Instability (NBTI) and Hot-carrier-induced (HCI) stresses using P and NMOSFETS, The devices are annealed with hydrogen or deuterium gas at high-pressure $(1\~5\;atm.)$ to introduce higher concentration in the gate oxide. Both interface trap and oxide bulk trap are found to dominate the reliability of gate oxide during electrical stress. The degradation mechanism depends on the condition of electrical stress that could change the location of damage area in the gate oxide. It was found the trap generation in the gate oxide film is mainly related to the breakage of Si-H bonds in the interface or the bulk area. We suggest that deuterium bonds in $SiO_2$ film are effective in suppressing the generation of traps related to the energetic hot carriers.
-
MOSFET 게이트 산화막내 결함 생성 억제를 위한 효과적인 중수소 이온 주입
이재성(Jae-Sung Lee),도승우(Seung-Woo Do),이용현(Yong-Hyun Lee) 대한전자공학회 2008 電子工學會論文誌-SD (Semiconductor and devices) Vol.45 No.7
중수소 처리된 3 ㎚ 두께의 게이트 산화막을 갖는 MOSFET를 제조하여 정전압 스트레스 동안의 게이트 산화막의 열화를 조사하였다. 중수소 처리는 열처리와 이온 주입법을 사용하여 각각 이루어졌다. 열처리 공정을 통해서는 게이트 산화막내 중수소의 농도를 조절하기가 힘들었다. 게이트 산화막내에 존재하는 과잉 중수소 결합은 열화를 가속시키기 때문에, 열처리 공정을 행한 소자에서 신뢰성이 표준공정에 의한 소자에 비해 저하되고 있음을 확인하였다. 그러나 중수소 이온 주입 방법을 통해서는 소자의 신뢰성이 개선됨을 확인하였다. 스트레스에 의한 게이트 누설 전류 변화 및 구동 특성 변화는 게이트 산화막내의 중수소 농도와 관련이 있으며, 이러한 특성은 적절한 공정 조건을 갖는 이온 주입법을 통해 개선할 수 있었다. 특히, 큰 스트레스 전압의 PMOSFET에서 중수소의 효과가 뚜렷하게 나타났으며, 이는 “hot” 정공과 중수소의 반응과 관련이 있는 것으로 판단된다. Experiment results are presented for gate oxide degradation under the constant voltage stress conditions using MOSFETs with 3-㎚-thick gate oxides that are treated by deuterium gas. Two kinds of methods, annealing and implantation, are suggested for the effective deuterium incorporation. Annealing process was rather difficult to control the concentration of deuterium. Because the excess deuterium in gate oxide could be a precursor for the wear-out of gate oxide film, we found annealing process did not show improved characteristics in device reliability, compared to conventional process. However, deuterium implantation at the back-end process was effective method for the deuterated gate oxide. Device parameter variations as well as the gate leakage current depend on the deuterium concentration and are improved by low-energy deuterium implantation, compared to those of conventional process. Especially, we found that PMOSFET experienced the high voltage stress shows a giant isotope effect. This is likely because the reaction between “hot” hole and deuterium is involved in the generation of oxide trap.
ScienceON연관 검색어 추천
이 검색어로 많이 본 자료
활용도 높은 자료
