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Fowler-Nordheim 터널링 전자주입에 의한 질화 게이트 산화막의 특성 분석
張聖洙,文成根,盧官鍾,盧用翰,李七基 성균관대학교 1998 학술회의지원논문목록집 Vol.1998 No.-
금속-산화막-반도체 전계효과 소자에서 차세대 게이트, 산화막으로 연구되고 있는 질화산화막을 N_(2)O 가스를 사용하여 2-단계 공정으로 성장하였으며, FNT 전자 주입을 이용하여 전기적 특성을 분석하였다. 열산화막을 질화시킬 경우 절연파괴 특성에서 질화전의 산화막 보다 신뢰성이 향상되었다. 또한, 질화산화막은 게이트 전자주입이 기판 전자주입보다 고열전자에 의한 열화에 좀 더 취약하였으며, 90~130A˚범위에서 두꺼운 질화산화막 일수록 쉽게 열화되는 경향을 확인하였다. 질화산화막의 게이트 전압의 극성 의존성 및 두께에 따른 열화의 차이를 설명하기 위한 모델을 제시하였다. Nitrided oxides which have been investigated as alternative gate oxide for Metal-Oxide- Semiconductor field effect devices were grown by two-step process using N_(2)O gas, and were characterized via a Fowler-Nordheim Tunneling(FNT) electron injection technique. Electrical characteristics or nitrided gate oxides were superior to that of control oxides. Further, the FNT electron injection into the nitrided gate oxides reveals that gate oxides degrade more both if electrons were forced to inject from the gate metal and if thicker nitrided gate oxides were used in the thickness range of 90-130A˚. Models are suggested to explain these phenomena.
Direct 반송방식에 기반을 둔 300mm FAB Line 시뮬레이션
이홍순,한영신,이칠기,Lee, Hong-Soon,Han, Young-Shin,Lee, Chil-Gee 한국시뮬레이션학회 2006 한국시뮬레이션학회 논문지 Vol.15 No.2
현재 반도체 산업은 200mm 웨이퍼에서 300mm 웨이퍼 공정으로 기술이 변화하고 있다. 300mm 웨이퍼 제조업체들은 Fabrication Line (FAB Line) 자동화를 비용절감 실현의 방책으로 사용하고 있다. 또한 기술의 확산, 시장 경쟁력의 격화 등으로 생산성 향상에 의한 원가절감이 반도체 산업 성장의 근본요인이 되고 있다. 대부분의 반도체 업체들은 생산성을 높이기 위해 average cycle time을 줄이는데 총력을 기울이고 있다. 본 논문에서는 average cycle time을 줄이는 데 중점을 두고, 300mm 반도체 제조공정을 시뮬레이션 하였다. Production environment of semiconductor industry is shifting from 200mm wafer process to 300mm wafer process. In the new era of semiconductor industry, FAB (fabrication) Line Automation is a key issue that semiconductor industry is facing in shifting from 200mm wafer fabrication to 300mm wafer fabrication. In addition, since the semiconductor manufacturing technologies are being widely spread and market competitions are being stiffened, cost-down techniques became basis of growth. Most companies are trying to reduce average cycle time to increase productivity and delivery time. In this paper, we simulated 300mm wafer fabrication semiconductor manufacturing process by laying great emphasis on reduce average cycle time.
김현기(Kim Hyun-Gee),선칠령(Seon Chil-Yeong),이채수(Lee Chae-Soo),Falah Alobaid 대한기계학회 2009 대한기계학회 춘추학술대회 Vol.2009 No.5
This paper presents a static and dynamic simulation model of a Super Critical Heat Recovery Steam Generator (SC HRSG) and its application to investigate the load changes and start-up processes for the next generation high efficiency combined cycles. To design the modem combined cycle power plants with high pressure and temperature steam requirements, it is necessary to generate detailed computer models. As an important supports for designers this study describes the upgrading of a validated subcritical HRSG model to SC HRSG. The model includes advanced control circuits to achieve a high level of accuracy, especially during startup. The comparison between the simulation results and the designed data in steady state and different load changes are documented. The obtained results demonstrate that the simulation is very reliable to predict the startup procedure for the SC HRSG. And differences in the thermal efficiency between Sub & SC HRSGs during warm start-up process are assessed.
EN Code 를 적용한 배열회수보일러의 드럼 피로수명평가
황석환(Hwang Sek-hwan),김현기(Kim Hyun-gee),선칠령(Seon Chil-yeong),이채수(Lee Chae-soo),이부윤(Lee Boo-youn) 대한기계학회 2010 대한기계학회 춘추학술대회 Vol.2010 No.11
The purpose of this study is to confirm the structural reliability of the main component in HRSG by evaluating the structural integrity of HP drum according to EN code. The HP drum is the most thick-walled pressure vessel in HRSG, in which significant thermal stresses occur during the load change and transient operation. In this paper, transient temperatures and pressures determined by the dynamic simulation were taken into consideration, and thermal and structural finite element analyses(FEA) were performed to properly evaluate their effects. Using the results of the FEA, fatigue life of the HP drum was evaluated.
수율향상을 위한 반도체 EDS공정에서의 불량유형 자동분류
한영신,이칠기,Han Young Shin,Lee Chil Gee 한국시뮬레이션학회 2005 한국시뮬레이션학회 논문지 Vol.14 No.1
In the semiconductor manufacturing, yield enhancement is an urgent issue. It is ideal to prevent all the failures. However, when a failure occurs, it is important to quickly specify the cause stage and take countermeasure. Reviewing wafer level and composite lot level yield patterns has always been an effective way of identifying yield inhibitors and driving process improvement. This process is very time consuming and as such generally occurs only when the overall yield of a device has dropped significantly enough to warrant investigation. The automatic method of failure pattern extraction from fail bit map provides reduced time to analysis and facilitates yield enhancement. The automatic method of failure pattern extraction from fail bit map provides reduced time to analysis and facilitates yield enhancement. This paper describes the techniques to automatically classifies a failure pattern using a fail bit map.
DEVS 형식론과 SES 프레임워크를 활용한 NXT 기반 임베디드 시스템 알고리즘에 대한 비교 연구
문지윤(Ji-Yoon Moon),이칠기(Chil-Gee Lee),한영신(Young-Shin Han) 한국정보기술학회 2013 한국정보기술학회논문지 Vol.11 No.11
Embedded system is a large part in modern society. Most people, however, do not know about embedded systems. The need for training related to embedded systems is increasing because embedded system technology is a core technology of the country these days. In this paper, we understand embedded systems easily using LEGO Mindstorms NXT that is used in the actual embedded system education. In addition, we perform the simulation based on DEVS formalism and SES framework as a part of the knowledge related with embedded systems. Measuring the time and probability for completing the track by several algorithms of line tracer, we determine the speed and accuracy of the algorithms. We adopt the best algorithm through the simulation results, and we make line tracer with the algorithm.
임지훈,이칠기,이영중,Im Ji-Hoon,Lee Chil-Gee,Lee Young-Joong 한국시뮬레이션학회 2005 한국시뮬레이션학회 논문지 Vol.14 No.4
Due to explosive expansion in R & D efforts for advancement of technological predominance by Enterprises, the volume of technical information rapidly increases and emphasize on the valuation of this information has grown ever increasingly important. Therefore the requirement for systematic management and safeguard and accumulation of these intellectual properties of the Enterprise is in very high demand. A lot of effort and research has been carried out and many on going studies in progress to try to derive the optimum solution on how to manage information retention policy, processes, execution method, and hardware to execute the information with and etc. The intent of this thesis is to recommend a way for the Enterprise on how to evaluate the valuation of the data and to suggest the method on how to manage these intellectual properties by way of using Information Lifecycle Management theory which manages data according to the business valuation of the data. The decision on valuation of data and retention cycle is based on analytic method of a nonparametric regression, experimentation was carried out by applying to Enterprise Document Management System to present the suitable retention cycle according to the valuation and variety of attribute of data.
과거의 판매자료 패턴에 근거한 반도체 생산 계획의 수립
박동식,한영신,이칠기,Park, Dong-Sik,Han, Young-Shin,Lee, Chil-Gee 한국시뮬레이션학회 2005 한국시뮬레이션학회 논문지 Vol.14 No.3
Designing a production and equipment investment plan for semiconductors, many variables must be taken into account. However, depending on these variables could bring many changes to the plans, and the end result is hard to predict. Because it's hard to predict the end result, it's never easy to make a standard production plan. So, the goal of this project is to design a production plan based on past marketing patterns to satisfyall the variables and come up with a reasonable thesis on a standardized process.