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Energy Efficient Clean and Green IT : Concepts and Approaches
Kartik kalia,Deepa Singh Sisodiya,Dinesh Sharma,Vishok Singh 보안공학연구지원센터 2015 International Journal of Smart Home Vol.9 No.6
Green IT practice is essential to minimize electricity bill. We have done our analysis on power consumption of computer. We have stated different management policies for reduction in energy consumption. Energy Star (ES) programme of the United States promotes energy efficiency in electronics products that provides an exceptional productivity as compared to the old or traditional systems. Energy Star program has been adopted by many countries to make a move towards Clean and Green environment. ES labels can be easily found on electronic appliances at homes, offices, buildings and many other places. Depending upon the devices, using these policies can result between 30%-90% of less power consumption. In our analysis, we got a reduction of 40% less power consumption in computers after implementing management policies. In this work, we are estimating power bill, and analyzing its economical feasibility along with that we are proposing a plan to reduce power consumption of academia and Institute. We have also discussed about management policies for disposal of e-waste.
Efficient IP Traffic over Optical Network Based on Wavelength Translation Switching
Vikas Jha,Kartik Kalia,Bhawani Shankar Chowdhary,D M Akbar Hussain,Deepa Singh 보안공학연구지원센터 2016 International Journal of Multimedia and Ubiquitous Vol.11 No.7
With the advent of TCP/IP protocol suite the overall era of communication technologies had been redefined. Now, we can’t ignore the presence of huge amount of IP traffic; data, voice or video increasing day by day creating more pressure on existing communicating media and supporting back bone. With the humongous popularity of Internet the overall traffic on Internet has the same story. Focusing on transmission of IP traffic in an optical network with signals remaining in their optical nature generated at particular wavelength, proposed is the switching of optically generated IP packets through optical cross connects based on translation of wavelength when an IP packet is crossing the optical cross connect. Adding the concepts of layer 3 routing protocols along with the wavelength translation scheme, will help in spanning the overall optical network for a larger area.
Ritu Singh,Kartik Kalia,M H Minver,M Akbar Hussain 보안공학연구지원센터 2016 International Journal of u- and e- Service, Scienc Vol.9 No.8
In this paper we have aimed to design an energy efficient and thermally aware Latin Unicode Reader. Our design is based on 28nm FPGA (Kintex-7) and 40nm FPGA (Artix-7). In order to test the portability of our design, we are operating our design with respective frequency of different mobile architecture. For thermal analysis of our energy efficient design, we have taken temperatures of four different regions from reference. Latin Unicode reader takes 16-bit hexadecimal code of alphabet and clock input. At the end we can conclude that the maximum power consumption is at 2.2GHz and minimum power consumption is at 1.2GHz. When we talk in terms of temperature we can see that maximum power is consumed at 329.85K and minimum power is consumed at 294.15K. And also the power dissipation is less in the case of 40nm (Artix-6) and is more in the case of 28nm (Kintex-7). Changing the parameter (Temperature) doesn’t affect the clock power in both cases (Gated and Non-gated).
FPGA Based Low Power DES Algorithm Design and Implementation using HTML Technology
Vandana Thind,Bishwajeet Pandey,Kartik Kalia,D M Akbar Hussain,Teerath Das,Tanesh Kumar 보안공학연구지원센터 2016 International Journal of Software Engineering and Vol.10 No.6
In this particular work, we have done power analysis of DES algorithm implemented on 28nm FPGA using HTML (H-HSUL, T-TTL, M-MOBILE_DDR, L-LVCMOS) technology. In this research, we have used high performance software Xilinx ISE where we have selected four different IO Standards i.e. MOBILE_DDR, HSUL_12, LVTTL and LVCMOS (LVCMOS_15, LVCMOS_18, LVCMOS_25 and LVCMOS_33). We have done power analysis of on-chip power like clock power, signals power, IO power, leakage power and supply power. We notified our analysis at five different voltages like 0.5V, 0.8V, 1.0V, 1.2V and 1.5V.
A Study of Today’s A.I. through Chatbots and Rediscovery of Machine Intelligence
Anirudh Khanna,Bishwajeet Pandey,Kushagra Vashishta,Kartik Kalia,Bhale Pradeepkumar,Teerath Das 보안공학연구지원센터 2015 International Journal of u- and e- Service, Scienc Vol.8 No.7
Artificial Intelligence in machines is a very challenging discussion. It involves the creation of machines which can simulate intelligence. This paper discusses some of the current trends and practices in AI and subsequently offers alternative theory for improvement in some of today’s prominent and widely accepted postulates. For this, focus on the structuring and functioning of a simple A.I. system - chatbots (or chatter bots) is made. The paper shows how current approach towards A.I. is not adequate and offers a new theory that discusses machine intelligence, throwing light to the future of intelligent systems.
Gaurav Verma,Vikas Verma,Divya Sharma,Adesh Kumar,Himanshu Verma,Kartik Kalia 보안공학연구지원센터 2016 International Journal of Smart Home Vol.10 No.3
Unicode font is used in coding system that assign a unique code to every symbol of scripts irrespective of their platform, and language. The Greek Unicoder receives 16-bit hexadecimal code of alphabet. The device has been designed to convert Greek language into different languages that our people could understand. This Unicode reader code has been implemented on 28nm FPGA platform called Kintex-7 FPGA. In this paper we are using frequency scaling technique and Design goal. In this paper power analysis is our main concern and we have studied about the power analysis at different frequencies keeping the temperature constant at 25 degree Celsius and maintaining the constant air flow.
Thermal aware Internet of Things Enable Energy Efficient Encoder Design for Security on FPGA
Deepa Singh,Kanika Garg,Ravneet Singh,Bishwajeet Pandey,Kartik Kalia,Hasmatullah Noori 보안공학연구지원센터 2015 International Journal of Security and Its Applicat Vol.9 No.6
In this work, we are going to use thermal aware approach in Encoder design and also testing thermal stability by working on different ambient temperatures 298.15K, 308.15K, 318.15K, 328,15K, 338.15K and 348.15K and 358.15K. We have observe the compatibility of our device with wireless network by working on different I/O standards (LVCMOS15 and LVCMOS25) . There is 30.29% reduction in leakage power, when we scale down temperature from 358.15K to 298.15K using LVCMOS15 as I/O standard on 40nm Virtex FPGA. Leakage power is calculated for 65nm FPGA and 90nm FPGA as well .In this work, we are using Verilog Hardware Description Language.
Voltage Scaling Based Wireless LAN Specific UART Design Based on 90nm FPGA
Rashmi Sharma,Lakshay Rohilla,Arjun Oberai,Sujeet Pandey,Vaashu Sharma,Kartik Kalia 보안공학연구지원센터 2016 International Journal of Smart Home Vol.10 No.3
This research work emphasizes on the design of the wireless LAN specific UART. The frequencies that are standardized for the wireless LANs have been analyzed by scaling the voltage. The aim is to find out the most energy efficient specifications for the UART. After all the calculations, deduction comes over to a point that increasing the voltages increases the power consumption and therefore, the wastage gets elevated too. However, at lower values there is lesser wastage of power and hence the efficiency increases. Virtex-4 FPGA and WLAN standards have been focused upon to make the UART design. Xilinx software as well as the Verilog Hardware Description Language have been used for the purpose. The power consumption swings between 16% to 95.59% for different values of voltages at the specified WLAN frequencies. Various power loss parameters have been studied to get the most optimum operating condition for the UART.