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Ⅲ-Ⅴ화합물 반도체 기반 Triple Gate MOSFET과 Gate All Around Nanowire NMOSFET의 성능 비교
문성일(Sung-Il Moon),윤석현(Seokhyeon Yoon),김정훈,김소영 대한전자공학회 2015 대한전자공학회 학술대회 Vol.2015 No.11
In the MOSFET technology, the downscaling of the channel length has been big issue between integration and SCEs in decades of years. However, in state-of-art sub-20nm CMOS technology, triple gate FinFET technology is good key to solve this trade off problem and furthermore, gate-all-around (GAA) Nanowire MOSFET is suggested. In this paper, we simulate triple gate MOSFET and GAA nanowire MOSFET based on 3D TCAD simulator Sentaurus. This work is based on InGaAs Compound Semiconductor for better mobility. Then we evaluate and compare SCE parameters of two.