RISS 학술연구정보서비스

검색
다국어 입력

http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.

변환된 중국어를 복사하여 사용하시면 됩니다.

예시)
  • 中文 을 입력하시려면 zhongwen을 입력하시고 space를누르시면됩니다.
  • 北京 을 입력하시려면 beijing을 입력하시고 space를 누르시면 됩니다.
닫기
    인기검색어 순위 펼치기

    RISS 인기검색어

      검색결과 좁혀 보기

      선택해제

      오늘 본 자료

      • 오늘 본 자료가 없습니다.
      더보기
      • 무료
      • 기관 내 무료
      • 유료
      • KCI등재

        Reverse-Conducting IGBT Using MEMS Technology on the Wafer Back Side

        원종일,고진근,이태복,오형승,이진호 한국전자통신연구원 2013 ETRI Journal Vol.35 No.4

        In this paper, we present a 600-V reverse conducting insulated gate bipolar transistor (RC-IGBT) for soft and hard switching applications, such as general purpose inverters. The newly developed RC-IGBT uses the deep reactive-ion etching trench technology without the thin wafer process technology. Therefore, a freewheeling diode (FWD) is monolithically integrated in an IGBT chip. The proposed RC-IGBT operates as an IGBT in forward conducting mode and as an FWD in reverse conducting mode. Also, to avoid the destructive failure of the gate oxide under the surge current and abnormal conditions, a protective Zener diode is successfully integrated in the gate electrode without compromising the operation performance of the IGBT.

      • KCI등재

        Electrical Characteristics of Triple-Gate RSO Power MOSFET (TGRMOS) with Various Gate Configurations and Bias Conditions

        나경일,원종일,고진근,김상기,김종대,양일석,이진호 한국전자통신연구원 2013 ETRI Journal Vol.35 No.3

        In this paper, we propose a triple-gate trench power MOSFET (TGRMOS) that is made through a modified RESURF stepped oxide (RSO) process, that is, the nitride_RSO process. The electrical characteristics of TGRMOSs, such as the blocking voltage (BVDS) and onstate current (ID,MAX), are strongly dependent on the gate configuration and its bias condition. In the nitride_RSO process, the thick single insulation layer (SiO2) of a conventional RSO power MOSFET is changed to a multilayered insulator (SiO2/SiNx/TEOS). The inserted SiNx layer can create the selective etching of the TEOS layer between the gate oxide and poly-Si layers. After additional oxidation and the poly-Si filling processes, the gates are automatically separated into three parts. Moreover, to confirm the variation in the electrical properties of TGRMOSs, such as BVDS and ID,MAX, simulation studies are performed on the function of the gate configurations and their bias conditions. BVDS and ID,MAX are controlled from 87 V to 152 V and from 0.14 mA to 0.24 mA at a 15-V gate voltage. This ID,MAX variation indicates the specific on-resistance modulation.

      연관 검색어 추천

      이 검색어로 많이 본 자료

      활용도 높은 자료

      해외이동버튼