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Energy-efficient static sparse-tree adder based on MUX-less bypassing architecture
Seongrim Choi,Jonghun Ahn,Kyungjin Byun,Byeong-Gyu Nam IET 2014 Electronics letters Vol.50 No.25
<P>An energy-efficient 64 bit static sparse-tree adder using a multiplexer (MUX)-less bypassing scheme is proposed for mobile central processing units. Conventionally, bypassing schemes have been used to eliminate unnecessary switching of circuits but have incorporated a large delay overhead due to their output MUX, which reduces the energy efficiency of circuits in terms of power-delay product (PDP). A novel static sparse-tree adder is presented based on a proposed MUX-less bypassing scheme to reduce the delay associated with the conventional bypassing scheme, thereby improving the energy efficiency, i.e. the PDP. Simulation results show a 30% reduction in PDP compared to the conventional bypassing adder and a 13% reduction from the state-of-the-art technique.</P>
Earliest Virtual Deadline Zero Laxity Scheduling for Improved Responsiveness of Mobile GPUs
Seongrim Choi,Suhwan Cho,Jonghyun Park,Byeong-Gyu Nam 대한전자공학회 2017 Journal of semiconductor technology and science Vol.17 No.1
Earliest virtual deadline zero laxity (EVDZL) algorithm is proposed for mobile GPU schedulers for its improved responsiveness. Responsiveness of user interface (UI) is one of the key factors in evaluating smart devices because of its significant impacts on user experiences. However, conventional GPU schedulers based on completely fair scheduling (CFS) shows a poor responsiveness due to its algorithmic complexity. In this letter, we present the EVDZL scheduler based on the conventional earliest deadline zero laxity (EDZL) algorithm by accommodating the virtual laxity concept into the scheduling. Experimental results show that the EVDZL scheduler improves the response time of the Android UI by 9.6% compared with the traditional CFS scheduler.
Earliest Virtual Deadline Zero Laxity Scheduling for Improved Responsiveness of Mobile GPUs
Choi, Seongrim,Cho, Suhwan,Park, Jonghyun,Nam, Byeong-Gyu The Institute of Electronics and Information Engin 2017 Journal of semiconductor technology and science Vol.17 No.1
Earliest virtual deadline zero laxity (EVDZL) algorithm is proposed for mobile GPU schedulers for its improved responsiveness. Responsiveness of user interface (UI) is one of the key factors in evaluating smart devices because of its significant impacts on user experiences. However, conventional GPU schedulers based on completely fair scheduling (CFS) shows a poor responsiveness due to its algorithmic complexity. In this letter, we present the EVDZL scheduler based on the conventional earliest deadline zero laxity (EDZL) algorithm by accommodating the virtual laxity concept into the scheduling. Experimental results show that the EVDZL scheduler improves the response time of the Android UI by 9.6% compared with the traditional CFS scheduler.
An Energy-Efficient Matching Accelerator Using Matching Prediction for Mobile Object Recognition
Seongrim Choi,Hwanyong Lee,Byeong-Gyu Nam 대한전자공학회 2016 Journal of semiconductor technology and science Vol.16 No.2
An energy-efficient object matching accelerator is proposed for mobile object recognition based on matching prediction scheme. Conventionally, vocabulary tree has been used to save the external memory bandwidth in object matching process but involved massive internal memory transactions to examine each object in a database. In this paper, a novel object matching accelerator is proposed based on matching predictions to reduce unnecessary internal memory transactions by mitigating nontarget object examinations, thereby improving the energy-efficiency. Experimental results show a 26% reduction in power-delay product compared to the prior art.
An Energy-Efficient Matching Accelerator Using Matching Prediction for Mobile Object Recognition
Choi, Seongrim,Lee, Hwanyong,Nam, Byeong-Gyu The Institute of Electronics and Information Engin 2016 Journal of semiconductor technology and science Vol.16 No.2
An energy-efficient object matching accelerator is proposed for mobile object recognition based on matching prediction scheme. Conventionally, vocabulary tree has been used to save the external memory bandwidth in object matching process but involved massive internal memory transactions to examine each object in a database. In this paper, a novel object matching accelerator is proposed based on matching predictions to reduce unnecessary internal memory transactions by mitigating non-target object examinations, thereby improving the energy-efficiency. Experimental results show a 26% reduction in power-delay product compared to the prior art.
서비스디자인프로세스를 활용한 크리에이터 굿즈 제작을 위한 사용자-공장 매칭 프로세스 제안
SeongRim Choi,SuGyeong Ryu,BoMin Lee,NaYeong Kim,JaeIn Lee 한국서비스디자인학회 2023 한국서비스디자인학회 학술대회자료집 Vol.2023 No.1
본 발표논문은 아마추어, 프로 크리에이터의 굿즈 제작 과정과 제작 업체를 찾는 경로와 설문 조사와 심층인터뷰를 통해 실제 크리에이터들이 겪는 문제점이었던 공장 간 비교 과정 이슈, 결과물 의 완성도 이슈, 한정된 제작공장 정보에 대한 이슈, 업체와의 커뮤니케이션 어려움 등의 이슈들을 도출 및 분석하여 크리에이터와 공장 간의 온·오프라인 매칭 서비스에 대해 제안한다. 본 서비스는 업체와 크리에이터를 연결하는 플랫폼이며 서비스의 핵심 키워드로는 효율성, 연결, 직관적이다. 서 비스의 핵심 고객은 굿즈 제작 업체를 찾는데 어려움을 겪고 있는 20-30대 크리에이터이며 서비스 는 웹서비스와 오프라인 페어 서비스로 구성되어 있다. This presentation paper proposes online and offline matching services between creators and factories by deriving and analyzing issues such as comparison process issues between factories, completeness of results, limited production plant information, and communication difficulties. This service is a platform that connects companies and creators, and the key keywords of the service are efficiency, connection, and intuitive. The core customer of the service is creators in their 20s and 30s who are having difficulty finding goods manufacturers, and the service consists of web services and offline pair services.
An Energy-Efficient 64-bit Prefix Adder based on Semidynamic and Bypassing Structures
Hwang, Jaemin,Choi, Seongrim,Nam, Byeong-Gyu The Institute of Electronics and Information Engin 2015 Journal of semiconductor technology and science Vol.15 No.1
An energy-efficient 64-bit prefix adder is proposed for micro-server processors based on both semidynamic and bypassing structures. Prefix adders consist of three main stages i.e. propagate-generate (PG) stage, carry merge (CM) tree, and sum generators. In this architecture, the PG and CM stages consume most of the power because these are based on domino circuits. This letter proposes a semidynamic PG stage for its energy-efficiency. In addition, we adopt the bypassing structure on the CM tree to reduce its switching activity. Experimental results show 19.1% improvement of energy efficiency from prior art.
An Energy-Efficient 64-bit Prefix Adder based on Semidynamic and Bypassing Structures
Jaemin Hwang,Seongrim Choi,Byeong-Gyu Nam 대한전자공학회 2015 Journal of semiconductor technology and science Vol.15 No.1
An energy-efficient 64-bit prefix adder is proposed for micro-server processors based on both semidynamic and bypassing structures. Prefix adders consist of three main stages i.e. propagate-generate (PG) stage, carry merge (CM) tree, and sum generators. In this architecture, the PG and CM stages consume most of the power because these are based on domino circuits. This letter proposes a semidynamic PG stage for its energy-efficiency. In addition, we adopt the bypassing structure on the CM tree to reduce its switching activity. Experimental results show 19.1% improvement of energy efficiency from prior art.
A Reconfigurable Lighting Engine for Mobile GPU Shaders
Jonghun Ahn,Seongrim Choi,Byeong-Gyu Nam 대한전자공학회 2015 Journal of semiconductor technology and science Vol.15 No.1
A reconfigurable lighting engine for widely used lighting models is proposed for low-power GPU shaders. Conventionally, lighting operations that involve many complex arithmetic operations were calculated by the shader programs on the GPU, which led to a significant energy overhead. In this letter, we propose a lighting engine to improve the energy-efficiency by supporting the widely used advanced lighting models in hardware. It supports the Blinn-Phong, Oren-Nayar, and Cook-Torrance models, by exploiting the logarithmic arithmetic and optimizing the trigonometric function evaluations for the energy-efficiency. Experimental results demonstrate 12.7%, 42.5%, and 35.5% reductions in terms of power-delay product from the shader program implementations for each lighting model. Moreover, our work shows 10.1% higher energy-efficiency for the Blinn-Phong model compared to the prior art.