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600Watt 급 LED 조명등의 열 해석 및 방열 설계
구경완(Kyoung-Wan Koo),한재섭(Jae-Sup Han),신부현(Buhyun Shin),김영식(Youngshik Kim),유봉조(Bong-Jo Ryu) 대한전기학회 2021 전기학회논문지 Vol.70 No.4
This paper deals with thermal flow analysis of LED lighting that is widely used in athletic facilities, underpass, household luminaries, etc. Recently, LED lighting is in the process of replacing the existing light sources based on the advantages of eco-friendliness, energy efficiency, high lifespan, etc. However, the heat generated from LED may lower the reliability of LED lighting by raising the temperature of chips. In this paper, it is verified that changing the form of the existing flat heatsink to a mechanically twisted structure without using a heat pipe for a 600-watt LED lighting is more effective for convectivity. Thermal analysis has been performed using a software, Solidworks-Flow Simulation 2017 version. The temperature analysis also has been performed according to the change of thickness of a heat sink at the room temperature. Through the analysis, average temperatures of the heatsink with 1.5 thickness are lower than that of the heatsink with 1.0 or 1.2 thickness.
Design of Linked 2-DOF IPMC Actuator Moudule
Youngshik Kim(김영식),Bong-Jo Ryu(유봉조),Kyoung-Wan Koo(구경완),Buhyun Shin(신부현) 대한전기학회 2019 전기학회논문지 Vol.68 No.7
The 2-DOF IPMC module is introduced in this research. Each rotation axis of 2-DOF IPMC module is perpendicular each other. A second segment of IPMC is attached across to end tap of the first segment of IPMC directly without any frame. The link method with 2 IPMC actuator is assemble using a slot simply and conductive epoxy adhesive is used for wiring. The single IPMC strips are connected to rigid links, the open-loop control of the IPMC manipulator. The inverse kinematics of the linked 2-DOF IPMC was established. The experimental results show 2-DOF motion of the IPMC actuator module. This 2-DOF IPMC actuator module can be improved or modified for example by adding more links to even more increase the workspace by adding an extra soft link to the tip of the manipulator for extra soft manipulation.
SF6와 SF6 - N2 가스를 이용한 텅스텐 박막의 플라즈마 식각에 관한 연구
고용득(Yong Deuk Ko),정광진(Kwang Jin Jeong),최성호(Song Ho Choi),구경완(Kyoung Wan Koo),조동율(Tong Yul Cho),천희곤(Hui Gon Chun) 한국센서학회 1999 센서학회지 Vol.8 No.3
The plasma etching of tungsten thin films has been studied with SF_6 gas in RIE system. The etch rate of a - phase W film with SF_6 gas plasma has been showed to depend strongly on process parameters (SF_6, SF_6-N₂ gas). Effect of Nz addition and etching selectivity between W film and photoresist have also been studied in detail. Etching profiles between W film and photoresist were investigated by SEM. The compounds on W surface after SF_6-N₂ gas plasma treatment were examined by XPS and the concentration of F ions was detected by OES during plasma on.
박경희,안순의,구경완,왕진석 충남대학교 산업기술연구소 2000 산업기술연구논문집 Vol.15 No.2
This paper shows experimentally that oxide layer on the p-type Si-substrate can grow at low temperature(500℃∼600℃) using high pressure water vapor system. As the result of experiment, oxide layer growth rate is about 0.19Å/min at 500℃, 0.43Å/min at 550℃, 1.2Å/min at 600℃ respectively. So, we know oxide layer growth follows reaction-controlled mechanism in given temperature range. Consequently, granting that oxide layer growth rate increases linearly to temperature over 600℃, we can expect oxide growth rate is 5.2Å/min at 1000℃. High pressure oxidation of silicon is particularly attractive for the thick oxidation of power MOSFET, because thermal oxide layers can grow at relatively low temperature in run times comparable to typical high-temperature. 1 atm conditions. In the condition of higher-temperature and high-pressure steam oxidation. the oxidation time is reduced significantly.
Recycled Si Wafer 를 이용한 태양전지의 제작과 특성 연구
최성호,정광진,구경완,조동율,천희곤 한국센서학회 2000 센서학회지 Vol.9 No.1
The recycled single crystal silicon wafers have been fabricated into solar cells. It can be a solution for the high cost in materials for solar cells and recycling of materials. So, p-type (100) single crystal silicon wafers with high resistivity of 10-14 Ωcm and the thickness of 650 ㎛ were used for the fabrication of solar cells. Optimistic conditions of formation of back surface field, surface texturing and anti-reflection coating were studied for getting high efficiency. In addition, thickness variation of solar cell was also studied for increase of efficiency. As a result, the solar cell with efficiency of 10 % with a curve fill factor of 0.53 was fabricated with the wafers which have the area of 4 ㎠ and thickness of 300 ㎛. According to above results, recycling possibility of wasted wafers to single crystal silicon solar cells was confirmed.