RISS 학술연구정보서비스

검색
다국어 입력

http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.

변환된 중국어를 복사하여 사용하시면 됩니다.

예시)
  • 中文 을 입력하시려면 zhongwen을 입력하시고 space를누르시면됩니다.
  • 北京 을 입력하시려면 beijing을 입력하시고 space를 누르시면 됩니다.
닫기
    인기검색어 순위 펼치기

    RISS 인기검색어

      검색결과 좁혀 보기

      선택해제
      • 좁혀본 항목 보기순서

        • 원문유무
        • 원문제공처
          펼치기
        • 등재정보
          펼치기
        • 학술지명
          펼치기
        • 주제분류
        • 발행연도
          펼치기
        • 작성언어

      오늘 본 자료

      • 오늘 본 자료가 없습니다.
      더보기
      • 무료
      • 기관 내 무료
      • 유료
      • KCI등재

        자기진단 기능을 이용한 비동기용 불휘발성 메모리 모듈의 설계

        양오,신우현,연준상 한국반도체디스플레이기술학회 2022 반도체디스플레이기술학회지 Vol.21 No.1

        In this paper, an asynchronous nonvolatile memory module using a self-diagnosis function was designed. For the system to work, a lot of data must be input/output, and memory that can be stored is required. The volatile memory is fast, but data is erased without power, and the nonvolatile memory is slow, but data can be stored semi-permanently without power. The non-volatile static random-access memory is designed to solve these memory problems. However, the non-volatile static random-access memory is weak external noise or electrical shock, data can be some error. To solve these data errors, self-diagnosis algorithms were applied to non-volatile static random-access memory using error correction code, cyclic redundancy check 32 and data check sum to increase the reliability and accuracy of data retention. In addition, the possibility of application to an asynchronous non-volatile storage system requiring reliability was suggested.

      • FPGA를 이용한 시퀀스 제어용 32비트 마이크로프로세서 설계

        양오,Yang, Oh 대한전자공학회 2003 電子工學會論文誌-SD (Semiconductor and devices) Vol.40 No.6

        본 논문은 FPGA를 이용하여 시퀀스 제어용 32비트 마이크로프로세서를 설계하였다. 이를 위해 VHDL을 이용하여 톱-다운 방식으로 마이크로프로세서를 설계하였으며, 고속처리의 문제점을 해결하기 위해 프로그램 메모리부와 데이터 메모리부를 분리하여 설계함으로써 인스트럭션을 페치 하는 도중에 시퀀스 명령을 실행할 수 있는 Harvard 구조로 설계하였다. 또한 마이크로프로세서의 명령어들을 시퀀스제어에 적합하도록 RISC형태의 32 비트 명령어로 고정하여 명령어의 디코딩 시간과 데이터 메모리의 인터페이스 시간을 줄였다. 특히 설계된 마이크로프로세서의 실시간 디버깅 기능을 구현하기 위해 싱글 스텝 런, 일정 프로그램 카운터 브레이크, 데이터 메모리와 일치시 정지 기능 등을 구현함으로써 구현된 프로세서의 디버깅을 쉽게 하였다. 또한, 시퀀스제어에 적합한 펄스명령, 스텝 콘트롤 명령, 마스터 콘트롤 명령 등과 같은 비트 조작 명령과, BIN형과 BCD형 산술명령, 배럴 쉬프트명령 등을 구현하였다. 이와 같은 기능들을 FPGA로 구현하기 위하여 자이링스(Xilinx)사의 V600EHQ240(60만 게이트)과 Foundation 4.2i를 사용하여 로직을 합성하였다. Foundation 합성툴 환경에서 시뮬레이션과 실험에서 성공적으로 수행되었다. 본 논문에서 구현된 시퀀스 제어용 마이크로프로세서의 우수성을 보이기 위해 시퀀스제어용 명령어를 많이 가지고 있는 Hitachi사의 마이크로프로세서인 H8S/2148과 성능을 비교하여 본 논문에서 설계된 시퀀스 제어용 프로세서가 우수함을 확인하였다. This paper presents the design of 32 bit microprocessor for a sequence control using a field programmable gate array(FPGA). The microprocessor was designed by a VHDL with top down method, the program memory was separated from the data memory for high speed execution of sequence instructions. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 32 bits. And the real time debug operation was implemented for easeful debugging the designed processor with a single step run, PC break point run, data memory break point run. Also in this designed microprocessor, pulse instructions, step controllers, master controllers, BM and BCD type arithmetic instructions, barrel shift instructions were implemented for sequence logic control. The FPGA was synthesized under a Xilinx's Foundation 4.2i Project Manager using a V600EHQ240 which contains 600,000 gates. Finally simulation and experiment were successfully performed respectively. For showing good performance, the designed microprocessor for the sequence logic control was compared with the H8S/2148 microprocessor which contained many bit instructions for sequence logic control. The designed processor for the sequence logic showed good performance.

      • FPGA를 이용한 시퀀스 로직 제어용 고속 프로세서 설계

        양오,Yang, Oh 대한전기학회 1999 전기학회논문지A Vol.48 No.12

        This paper presents the design of high speed processor for a sequence logic control using field programmable gate array(FPGA). The sequence logic controller is widely used for automating a variety of industrial plants. The FPGA designed by VHDL consists of program and data memory interface block, input and output block, instruction fetch and decoder block, register and ALU block, program counter block, debug control block respectively. Dedicated clock inputs in the FPGA were used for high speed execution, and also the program memory was separated from the data memory for high speed execution of the sequence instructions at 40 MHz clock. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 16 bits or 32 bits respectively. And the real time debug operation was implemented for easy debugging the designed processor. This FPGA was synthesized by pASIC 2 SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to sequence control system with inputs and outputs of 256 points. The designed processor for the sequence logic was compared with the control system using the DSP(TM320C32-40MHz) and conventional PLC system. The designed processor for the sequence logic showed good performance.

      • 에너지 저장시스템을 위한 납축전지의 충·방전시스템 설계

        양오 청주대학교 2018 産業科學硏究 Vol.35 No.2

        This paper proposes the charge and discharge system design of lead acid battery for ESS(energy storage system) which is the new renewable energy that government has recently promoted. The proposed lead acid battery charge and discharge system consists of two capacitors, a buck-boost converter, three level T-type inverter, LC filter and DC_Link stage. Using a 12V(40AH) battery per charge and discharge experiment with 25 series connections, the inverter output was 3KW and 97% efficiency at switching frequency of 16.8KHz. The experimental results show that the proposed energy storage system reaches the expected good performance.

      • KCI등재후보

        PD 제어기와 신경회로망을 이용한 유도전동기의 속도제어

        梁吾 대한전자공학회 2002 電子工學會論文誌-SC (System and control) Vol.39 No.3

        This paper presents the implementation of the speed control system for 3 phase induction motor using PD controller and neural networks. The PD controller is used to control the motor and to train neural networks at the first time. And neural networks are widely used as controllers because of a nonlinear mapping capability, we used feedforward neural networks(FNN) in order to simply design the speed control system of the 3 phase induction motor. Neural networks are tuned online using the speed reference, actual speed measured from an encoder and control input current to motor. PD controller and neural networks are applied to the speed control system for 3 phase induction motor, are compared with PI controller through computer simulation and experiment respectively. The results are illustrated that the output of the PD controller is decreased and feedforward neural networks act main controller, and the proposed hybrid controllers show better performance than the PI controller in abrupt load variation and the precise control is possible because the steady state error can be minimized by training neural networks. 본 논문에서는 PD 제어기와 신경회로망을 이용하여 3상 유도전동기의 속도제어 시스템을 구현하고자 한다. PD 제어기는 초기의 제어를 담당하며 신경회로망의 초기 학습을 담당한다. 또한, 신경회로망은 비선형 매핑능력과 학습능력이 탁월하기 때문에 제어기로 많이 사용되며 특히 전향경로 신경망은 구조가 매우 간단하기 때문에 본 논문에서는 이를 이용하여 유도전동기의 속도제어 시스템에 구현하였다. 신경회로망의 입력으로는 모터의 기준속도, 엔코더를 이용하여 측정한 모터의 실제 속도와 제어입력 전류를 이용하였고, 온라인 상태로 학습되도록 하였다. 본 논문에서 제안된 알고리즘의 타당성을 보이기 위해 기존에 널리 사용되었던 PI 제어기와 비교평가를 하였으며 시뮬레이션과 실험결과로부터 초기운전 상태에서는 PD 제어기가 주로 제어를 담당하지만 시간이 지남에 따라 신경회로망이 학습되어 신경회로망이 주 제어기가 됨을 확인하였다. 아울러, 제안된 하이브리드 제어기가 PI 제어기보다 우수하고 특히 부하변동과 같은 외란에 강인함을 알 수 있었으며, 정상상태 오차가 현저히 감소하여 정밀한 속도제어가 가능함을 확인하였다.

      • KCI등재

        AJAX를 이용한 소방엔진펌프의 모니터링과제어 시스템 구현

        양오,이헌국 한국반도체디스플레이기술학회 2016 반도체디스플레이기술학회지 Vol.15 No.3

        In this paper, the fire engine pump is controlled and monitored by the AJAX (Asynchronous Javascript and Xml) in the web server. The embedded system with built-in system having a processor and a memory of high performance occurs many problems in transmitting the large amount of data in real time through the web server. The AJAX is different from HTML (Hyper Text Makeup Language) with java script technology and can make RIA (Rich Internet Application). It process the necessary data by using asynchronous and it take advantage of usefulness, accessibility, a fast response time. Using AJAX can build up web server with real time and monitoring that fire engine pump status, check processing pump memory in the event of fire, also remotely monitors can do. The web server system can control the fire engine pump as like the black box. The experimental results show the effectiveness and commercialize possibility.

      • KCI등재

        태양광 패널 최적기의 유선 및 무선 통신 시스템 설계에 관한 연구

        양오 한국반도체디스플레이기술학회 2019 반도체디스플레이기술학회지 Vol.18 No.2

        In this paper, we have designed a solar photovoltaic system to attach solar photovoltaic modules to each module and develop the best efficiency in each module. The efficiency of the designed solar panel optimizer was more than 99.27% and MPPT efficiency of 99.66%. In addition, the monitoring of power generation and abnormal operation phenomenon in each optimum period and tracking for failure location of specific photovoltaic module have improved the utilization rate of photovoltaic power generation. Wired and wireless communication methods has been proposed to monitor the power generation and operation status of the solar panel optimizer. For this purpose, the RS485 communication was used for wire communication and Zigbee communication was used for wireless communication to monitor the status of each module in real time. It is shown that communication redundancy can be achieved through the proposed method, and the possibility of commercialization is suggested.

      • 신경 회로망을 이용한 3상 유도전동기의 위치 제어시스템 구현에 관한 연구

        양오 청주대학교 산업과학연구소 1999 産業科學硏究 Vol.17 No.1

        A PID controller has been used for industrial machine control since it has many advantages such as the simple structure and fast response. But it is difficult to find the optimal value of proportional, integral and differential gain for the PID controller and the steady state error makes the application to precision control system unsuitable. A control algorithm using Neural Networks and reaching mode controller had been proposed to solve these problems and the algorithm was implemented in this paper. DSP(TMS320C31) which is high speed processor and FPGA designed for motor control were used for the fast calculation of response, control input, PWM wave generation, and speed measurement of the induction motor. Experimentation for position control of 3 phase induction motor was executed to show superiority of this controller and the probability of application to industrial machine.

      • 영구자석 동기전동기의 속도제어에 관한 연구

        양오 청주대학교 2016 産業科學硏究 Vol.33 No.2

        This paper presents the speed control of a Permanent Magnet Synchronous Motor (PMSM) using incremental encoder and disturbance observer. Rotor position information and speed information are important when driving the PMSM. Generally, The encoder is used to obtain rotor information. However, if the motor shaft and encoder combination is twisted or deviated caused a ripple in the measured speed. Speed ripple can adversely affect the speed control of a permanent magnet synchronous motor. Disturbance observer can improve the speed ripple and speed overshoot. This observer is used for the rotor in order to reduce the error of the speed control. The performance of the proposed control algorithm is verified through the experiment.

      • KCI등재

        다기능 복합관절 연속수동운동 의료기기 설계

        양오,이강원,이창호 한국반도체디스플레이기술학회 2022 반도체디스플레이기술학회지 Vol.21 No.4

        The number of joint disease patients is increasing every year. Currently, the most CPM(Continuous Passive Motion) equipment uses expensive imported equipment, and one CPM equipment is designed to be used only in one joint, medical personnel or hospitals who are the main users of the medical equipment need to have several types of CPMs for joint rehabilitation. To solve this problem, this paper designed a multifunctional joint medical equipment that enables rehabilitation of knee, shoulder, and elbow joints in one CPM equipment and includes general, intensive, and adaptive exercise functions for effective treatment according to the patient's condition. The patient's condition was diagnosed using a load cell and a current sensor. In this paper, effective rehabilitation methods were presented and high reliability and precision of medical equipment was confirmed through experiments using potentiometer, encoder, and PI controller.

      연관 검색어 추천

      이 검색어로 많이 본 자료

      활용도 높은 자료

      해외이동버튼