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음향 챔버형 마이크로폰 검교정기의 검교정 주파수 한계와 모드 특성을 이용한 개선 방법에 관한 연구
김차영,신금재,문원규 한국음향학회 2022 韓國音響學會誌 Vol.41 No.1
This paper identifies the cause of the high frequency calibration limit of the acoustic chamber type calibrator for microphone calibration and presents a method to improve it. By using a commercial finite element analysis software, we analyzed the calibration frequency limit of the acoustic chamber type calibrator through eigen-frequency and frequency domain analysis. Based on this, we designed and fabricated an acoustic chamber type calibrator that can precisely calibrate within 1 dB from about 2 Hz to 6.4 kHz and verified its performance through experiments. The acoustic chamber type calibrator fabricated through this study has the advantage of being able to calibrate multiple microphones simultaneously in a wide frequency range, so it can be usefully used for simple calibration for multiple microphones. 본 논문은 마이크로폰 검교정을 위한 음향 챔버형 검교정기의 고주파 검교정 한계가 나타나는 원인을 밝히고이를 향상시키는 방법을 제시한다. 상용 유한요소 해석 프로그램을 활용하여 고유 주파수 해석과 주파수 영역 해석을통해 음향 챔버형 검교정기의 검교정 주파수 한계를 분석하였고, 이를 바탕으로 약 2 Hz 부터 6.4 kHz 까지 1 dB 수준이내로 정교하게 검교정할 수 있는 음향 챔버형 검교정기를 설계 및 제작하고 실험을 통해 그 성능을 검증하였다. 본연구를 통해 제안된 음향 챔버형 검교정기는 넓은 주파수 범위에서 다수의 마이크로폰을 동시에 검교정 할 수 있는 이점을 가지고 있어 다수의 마이크로폰을 위한 간편한 검교정에 유용하게 사용될 수 있다.
단일 식각 홀을 갖는 SiO2 희생층의 불화수소 증기 식각
김차영,노은식,신금재,문원규 한국센서학회 2023 센서학회지 Vol.32 No.5
This study experimentally verified the etch rate of the SiO2 sacrificial layer etching process with a single etch hole using vapor-phasehydrogen fluoride (VHF) etching. To fabricate small-sized polysilicon etch holes, both circular and triangular pattern masks wereemployed. Etch holes were fabricated in the polysilicon thin film on the SiO2 sacrificial layer, and VHF etching was performed to releasethe polysilicon thin film. The lateral etch rate was measured for varying etch hole sizes and sacrificial layer thicknesses. Based on the measuredresults, we obtained an approximate equation for the etch rate as a function of the etch hole size and sacrificial layer thickness. Theetch rates obtained in this study can be utilized to minimize structural damage caused by incomplete or excessive etching in sacrificiallayer processes. In addition, the results of this study provide insights for optimizing sacrificial layer etching and properly designing thesize and spacing of the etch holes. In the future, further research will be conducted to explore the formation of structures using chemicalvapor deposition (CVD) processes to simultaneously seal etch hole and prevent adhesion owing to polysilicon film vibration.
CMOS 표준 공정을 통한 SPM 프로브의 제작 및 그 성능 평가
이훈택 ( Hoontaek Lee ),김준수 ( Junsoo Kim ),신금재 ( Kumjae Shin ),문원규 ( Wonkyu Moon ) 한국센서학회 2021 센서학회지 Vol.30 No.4
In this paper, we report the fabrication of the tip-on-gate of a field-effect-transistor (ToGoFET) probe using a standard complementary metal-oxide-semiconductor (CMOS) process and the performance evaluation of the fabricated probe. After the CMOS process, I-V characteristic measurement was performed on the reference MOSFET. We confirmed that the ToGoFET probe could be operated at a gate voltage of 0 V due to channel ion implantation. The transconductance at the operating point (Vg = 0 V, Vd = 2 V) was 360 μA/ V. After the fabrication process was completed, calibration was performed using a pure metal sample. For sensitivity calibration, the relationship between the input voltage of the sample and the output current of the probe was determined and the result was consistent with the measurement result of the reference MOSFET. An oxide sample measurement was performed as an example of an application of the new ToGoFET probe. According to the measurement, the ToGoFET probe could spatially resolve a hundred nanometers with a height of a few nanometers in both the topographic image and the ToGoFET image.