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Younghyun Lim,Jeonghyun Lee,Yongsun Lee,Seong-Sik Song,Hong-Teuk Kim,Ockgoo Lee,Jaehyouk Choi Institute of Electrical and Electronics Engineers 2017 IEEE transactions on very large scale integration Vol.25 No.11
<P>An external capacitor-less ultra low-dropout (LDO) regulator that can continue to provide high power-supply rejection (PSR) over a wide range of the load current is proposed. Using the loop-gain stabilizer (LGS) to fix the dc level of the output voltage of the error amplifier to the optimal value, the LDO can keep maximizing the unity-gain frequency, while the load current changes widely up to 200 mA. Despite the multiple poles in the regulating loop, the stability can easily be obtained due to an intrinsic left-half plane zero, generated by the auxiliary path of the LGS. The proposed LDO was fabricated in a 40-nm CMOS process, and it had an input voltage of 1.1 V. When the dropout voltage was 0.1 V and the load current was 200 mA, the measured PSRs were -60 and -35 dB at 1 and 10 MHz, respectively. Due to the LGS, the dc loop gain was maintained to be high, resulting in good load and line regulations of 19 mu V/mA and 0.75 mV/V, respectively. While the total current consumption of the LDO was 275 mu A, the LGS consumed only 7 mu A. The area was 0.008 mm(2) with 4-pF on-chip capacitance for compensation.</P>
Lim, Younghyun,Lee, Jeonghyun,Park, Suneui,Jo, Yongwoo,Choi, Jaehyouk IEEE 2018 IEEE journal of solid-state circuits Vol.53 No.9
<P>Herein is presented an external capacitorless low-dropout regulator (LDO) that provides high-power-supply rejection (PSR) at all low-to-high frequencies. The LDO is designed to have the dominant pole at the gate of the pass transistor to secure stability without the use of an external capacitor, even when the load current increases significantly. Using the proposed adaptive supply-ripple cancellation (ASRC) technique, in which the ripples copied from the supply are injected adaptively to the body gate, the PSR hump that appears in conventional gate-pole-dominant LDOs can be suppressed significantly. Since the ASRC circuit continues to adjust the magnitude of the injecting ripples to an optimal value, the LDO presented here can maintain high PSRs, irrespective of the magnitude of the load current <TEX>$I_{L}$</TEX>, or the dropout voltage <TEX>$V_{\mathrm {DO}}$</TEX>. The proposed LDO was fabricated in a 65-nm CMOS process, and it had an input voltage of 1.2 V. With a 240-pF load capacitor, the measured PSRs were less than −36 dB at all frequencies from 10 kHz to 1 GHz, despite changes of <TEX>$I_{L}$</TEX> and <TEX>$V_{\mathrm {DO}}$</TEX> as well as process, voltage, temperature (PVT) variations.</P>
Energy storage and generation through desalination using flow-electrodes capacitive deionization
Hyunseung Lim,Yuncheol Ha,Hye Bin Jung,Pil Sung Jo,Hana Yoon,Do Quyen,Namchul Cho,Chung-Yul Yoo,Younghyun Cho 한국공업화학회 2020 Journal of Industrial and Engineering Chemistry Vol.81 No.-
Flow electrodes-based capacitive deionization (FCDI) is a highly energy-efficient desalination processcompared to conventional processes, including reverse osmosis and multi-stageflash distillation. Furthermore, it provides a continuous desalinationflow with high salt-removal capacity, whereas CDIusingfixed electrodes requires additional electrode rinsing. In FCDI, salt ions are adsorbed ontoflowcarbon electrodes and stored in the electrode slurry container, which is similar to an electrochemicalflowcapacitor. Therefore, stored ions can generate energy during discharging in FCDI operation. In this study,such energy generation was systematically investigated in terms of the various discharging rates, feedconcentrations, and volume offlow-electrode slurry. We found that the results were correlated with thechanges in the salt concentration of the effluentflow. The discharging current of 50 mA showed thehighest capacity for energy generation out of all the experimental conditions; it recovered around 25% ofthe energy consumed during FCDI desalination. We believe that such energy recovery can greatly reducethe energy consumption needed for FCDI desalination. Such recycling of generated energy would makeFCDI more attractive than other conventional desalination techniques.
김영현(Younghyun Kim),박병석(Byungseok Park),임용훈(Yonghoon Lim),현덕화(Duckhwa Hyun) 전력전자학회 2004 전력전자학술대회 논문집 Vol.- No.-
본 논문에서는 전력선 통신 및 무선 통신망을 이용하여 전력 사용량을 자동적으로 검침 및 관리할 수 있는 시스템, AMR(Automated Metering Rating)을 개발한다. 본 시스템은 원격 검침 및 수요 관리, 전력정보 제공 등 지능형 부가 서비스를 지원할 수 있는 있도록 설계하고, 이렇게 설계된 시스템은 실제 환경에 설치하여 성능 시험을 수행한다.
Inhibition of KIF20A suppresses the replication of influenza A virus by inhibiting viral entry
Hoyeon Jeon,Younghyun Lim,In-Gu Lee,Dong-In Kim,Keun Pil Kim,So-Hee Hong,Jeongkyu Kim,Youn-Sang Jung,Young-Jin Seo 한국미생물학회 2022 The journal of microbiology Vol.60 No.11
The influenza A virus (IAV) has caused several pandemics, and therefore there are many ongoing efforts to identify novel antiviral therapeutic strategies including vaccines and antiviral drugs. However, influenza viruses continuously undergo antigenic drift and shift, resulting in the emergence of mutated viruses. In turn, this decreases the efficiency of existing vaccines and antiviral drugs to control IAV infection. Therefore, this study sought to identify alternative therapeutic strategies targeting host cell factors rather than viruses to avoid infection by mutated viruses. Particularly, we investigated the role of KIF20A that is one of kinesin superfamily proteins in the replication of IAV. The KIF20A increased viral protein levels in IAV-infected cells by regulating the initial entry stage during viral infection. Furthermore, the KIF20A inhibitor significantly suppressed viral replication, which protected mice from morbidity and mortality. Therefore, our findings demonstrated that KIF20A is highly involved in the viral replication process and viral propagation both in vitro and in vivo, and could thus be used as a target for the development of novel antiviral drugs.
Choi, Seojin,Yoo, Seyeon,Lim, Younghyun,Choi, Jaehyouk IEEE 2016 IEEE journal of solid-state circuits Vol.51 No.8
<P>A low-jitter, ring-type voltage-controlled oscillator (VCO)-based injection-locked clock multiplier (ILCM) with a continuous frequency-tracking loop (FTL) for process-voltage-temperature (PVT)-calibration is presented. Using a single replica-delay cell of the VCO that provides the intrinsic phase information of the free-running VCO, the proposed FTL can continuously track and correct frequency drifts. Therefore, the proposed ILCM can calibrate real-time frequency drifts due to voltage or temperature variations as well as static frequency deviations due to process variations. Since the FTL provided an additional filtering of in-band VCO noise, the ILCM was able to achieve excellent jitter performance over the PVT variations, while it was based on a ring-VCO. The proposed ILCM was fabricated in a 65 nm CMOS process. When injection locked, the RMS-jitter integrated from 10 kHz to 40 MHz of the 1.20 GHz output signal was 185 fs. The proposed PVT-calibrator regulated the degradations of jitter to less than 5% and 7% over temperatures and supply voltages, respectively. The active area was 0.06 mm(2) and total power consumption was 9.5 mW.</P>
오성근(Oh, Sungkeun),임충현(Lim, Chung-Hyun),조영현(Cho, Younghyun) 한국신재생에너지학회 2010 한국신재생에너지학회 학술대회논문집 Vol.2010 No.11
In the crystalline silicon solar cells, the full area aluminum_back surface field(BSF) is routinely achieved through the screen-printing of aluminum paste and rapid firing. It is widely used in the industrial solar cell because of the simple and cost-effective process to suppress the overall recombination at the back surface. However, it still has limitations such as the relatively higher recombination rate and the low-to-moderate reflectance. In addition, it is difficult to apply it to thinner substrate due to wafer bowing. In the recent years, the dielectric back-passivated cell with local back contacts has been developed and implemented to overcome its disadvantages. Although it is successful to gain a lower value of surface recombination velocity(SRV), the series resistance(R_{series}) becomes even more important than the conventional solar cell. That is, it is a trade off relationship between the SRV and the R_{series} as a function of the contact size, the contact spacing and the geometry of the opening. Therefore it is essential to find the best compromise between them for the high efficiency solar cell. We have investigated the optimal design for the local back contact by using PC1D simulation.
Han, Ki Jin,Lim, Younghyun,Kim, Youngmin The Institute of Electronics and Information Engin 2014 Journal of semiconductor technology and science Vol.14 No.5
In this study, the effects of the frequency-dependent characteristics of through-silicon vias (TSVs) on the performance of 3D ICs are examined by evaluating a typical interconnection structure, which is composed of 32-nm CMOS inverter drivers and receivers connected through TSVs. The frequency-domain model of TSVs is extracted in S-parameter from a 3D electromagnetic (EM) method, where the dimensional variation effect of TSVs can be accurately considered for a comprehensive parameter sweep simulation. A parametric analysis shows that the propagation delay increases with the diameter and height of the TSVs but decreases with the pitch and liner thickness. We also investigate the crosstalk effect between TSVs by testing different signaling conditions. From the simulations, the worst signal integrity is observed when the signal experiences a simultaneously coupled transition in the opposite direction from the aggressor lines. Simulation results for nine-TSV bundles having regular and staggered patterns reveal that the proposed method can characterize TSV-based 3D interconnections of any dimensions and patterns.