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      • Capacitance Scaling With Different IO Standard Based Energy Efficient Bio-Medical Wrist Watch Design on 28nm FGPA

        Shivani Madhok,Gaurav Verma,Ankur Bhardwa j,Himanshu Verma,Ipsita Singh,Sushant Shekhar 보안공학연구지원센터 2015 International Journal of Bio-Science and Bio-Techn Vol.7 No.4

        In this paper, we have designed an energy efficient wrist watch on 28nm FPGA. The code has been implemented in Xilinx ISE Design Suite 14.2. The device used is XC7K160T, package used is FBG676 and it is working on -3 speed grade. The wrist band will take the blood pressure as input and will tell about the state of the person wearing it. The design supports Internet of things service that’s why IP addresses are involved. This wrist band design is very helpful in biomedical areas. Research is in progress in this field. In this paper frequency is varied to obtain power consumption of Wrist Watch. Airflow has been kept 250 LFM and medium Heat sink. IO Standards has been varied in order to achieve an energy efficient device. Main emphasis has been done on MOBILE_DDR, LVTTL, HSUL_12, HSTL_I, LVCMOS33 and SSTL15 IO Standards. To design an energy efficient device we are using capacitance scaling and the capacitance is scaled down from 100pF to 20pF. During capacitance scaling, we observe that there is no change in clock power, logic power and signal power. Thermal Aware design is current research area. Analysis has been at two temperatures that is at 25 degree Celsius and at 50 degree Celsius. At the end we can conclude that the maximum power is consumed at 2.2GHz and minimum power is consumed at 1.2GHz. In respect of capacitance maximum power is consumed at 100pF and minimum power is consumed at 20pF at both temperatures at 25 degree Celsius and 50 degree Celsius.

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