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RISS 인기검색어
- 검색키워드
- 저자 : Prateek Kumar Gupta (검색결과 3 건)
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Prateek Kumar,Maneesha Gupta,Kunwar Singh,Naveen Kumar 한국전기전자재료학회 2022 Transactions on Electrical and Electronic Material Vol.23 No.2
Continuous failure of Metal oxide semiconductor field-effect transistors due to short channel effects has motivated researchers to find novel devices like tunnel field-effect transistors and junctionless transistors. The impractical nature of the analysed devices showed that the metal oxide semiconductor field-effect transistor is still the backbone of the industry. In this manuscript, a single transistor-based AND gate is analysed. For designing the gate, a split-gate metal oxide semiconductor field-effect-transistor is used. Due to the physical limitations of Silicon, MoTe2 is considered as the substrate material. To consider all the quantum effects, the Non-equilibrium Green’s function is used to solve the device behavior. The split-gate acts as the input for the designed AND logic structure. For state ‘01’ and ‘10’, different device properties are studied andit is shown that proper conduction does not take place when either of the gates is in OFF-state. For state ‘11’, the analysed device operates as conventional MOSFET, and the drain current–gate voltage characteristics are studied. To investigate the device thoroughly, the effect of parameter variation on device characteristics is examined. The device behavior as an AND gate is confi rmed by checking the linearity parameters. It is found that the device can be used as an AND gate with low noise and power dissipation.
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Prateek Kumar,Maneesha Gupta,Gaurav Kr,Naveen Kumar,Vishal Yadav 한국전기전자재료학회 2021 Transactions on Electrical and Electronic Material Vol.22 No.4
At nanoscale along with the failure of Metal oxide semiconductor field-effect transistor due to short channel effects, Silicon has raised as another bottleneck for researchers. In the last couple of decades, researchers have provided diff erent solutions in the form of Graphene and Transition Metal Dichalcogenides materials. Each Graphene and Transition Metal Dichalcogenides has its own set of disadvantages like poor I ON /I OFF ratio and lower carrier mobility and hence cannot be used individually. In this article, a tub type metal oxide semiconductor field-effect transistor is designed and for application of the device in a low power VLSI domain, the back-gated technique is used. Different device properties are studied first with a Silicon-based channel and then a Silicon-Tungsten Disulphide heterojunction channel. The selection of SiO2 as a gate insulator and contact material is also justified. This article shows that instead of using conventional Silicon-based devices it is better to use heterojunction devices, as they offer much lower OFF-state current and better linearity properties.
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Design and Implementation of Router for NOC on FPGA
Gaurav Verma,Harsh Agarwal,Shreya Singh,Shaheem Nighat Khanam,Prateek Kumar Gupta,Vishal Jain 보안공학연구지원센터 2016 International Journal of Future Generation Communi Vol.9 No.12
In today’s technological era, SOC has undergone rapid evolution and is still processing at a swift pace. But due to this explosive evolution of semiconductor industry, the devices are scaling down at a rapid rate and hence, SOC today have become communication-centric. However, the existing bus architectures comprising of wires for global interconnection in SOC design are undergoing design crises as they are not able to keep up with the rate of scaling down of devices. To overcome bottleneck of communication system, NOC is an upcoming archetype. In on-chip network, router is considered as an important component. This paper proposes router, its components and parameters which affects the entire design. Thus, to validate the functioning of NOC on hardware, router has been designed in VHDL and simulated in Xilinx ISE 14.1 targeting Xilinx XC5VLX30-3 FPGA.
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