http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
Memory Efficient Multi-Resolution Motion Estimation in the Transform Domain
Jooheung Lee 대한전자공학회 2007 ITC-CSCC :International Technical Conference on Ci Vol.2007 No.7
In this paper, we propose multi-resolution motion estimation technique in the transform domain. Since the low-pass filtered and down-sampled image can be directly implemented by removing the high frequency DCT coefficients and inverse-transforming the low frequency DCT coefficients with down-sampled basis vectors, the traditional hierarchical search algorithm can be performed directly in the DCT domain. The proposed algorithm is compared with the motion estimation algorithms in the spatial domain to show its benefits in the aspects of PSNR, compression ratio, and frame memory size.
주파수 영역에서의 움직임 예측 및 보상과 다운 샘플링을 위한 하드웨어 아키텍처
홍현기(Hyeongi Hong),이주흥(Jooheung Lee) 한국산학기술학회 2014 한국산학기술학회 학술대회 Vol.- No.-
본 논문에서는 DCT 기반의 움직임 예측 및 보상과 다운 샘플링을 동시에 수행하는 알고리즘을 이용 하여 트랜스코딩과 같은 응용분야에서 실시간 연산 능력을 제공할 수 있는 VLSI 아키텍처를 제안한 다. 이전 연구에서 제안한 DCT 기반에서의 움직임 연산과 다운 샘플링 연산을 효과적으로 수행할 수 있는 재귀 방정식을 활용하여 하드웨어를 구현하였다. DCT 변환의 희소성을 이용하면 재귀 방정식을 수행할 때 0이 아닌 DCT 계수만 연산하게 됨으로 효과적으로 연산량을 줄일 수 있다. Non-zero DCT의 개수가 N일 경우 하나의 블록을 처리하는데 요구되는 클럭의 수는 N×4+66으로 압축률이 높 을수록 더욱 빠른 연산을 수행할 수 있다.
방대윤(Daeyoon Bang),이주흥(Jooheung Lee) 한국산학기술학회 2014 한국산학기술학회 학술대회 Vol.- No.-
본 논문에서는 하드웨어 자원을 효율적으로 이용하는 디블록킹 필터의 설계에 대한 아이디어를 제안 하고, 이에 따른 하드웨어를 구현 하였다. 입력되는 영상신호의 다양한 특성에 따라 적응적으로 디블 로킹 필터를 사용하기 위해서 FPGA의 Dynamic Partial Reconfiguration 기술을 활용한다. 설계한 디 블로킹 필터는 5-스테이지로 파이프라인된 에지 필터로 되어있다. 본 실험에서는 Xilinx Spartan-6 XC65LX45 FPGA 보드를 이용하였으며, VHDL을 이용하여 설계된 디블로킹 필터는 197 clocks/MB, 최대 동작 주파수 108 MHz 의 성능을 보여주고 있다.
Write-Amount-Aware Management Policies for STT-RAM Caches
Kim, Hyeonggyu,Kim, Soontae,Lee, Jooheung IEEE 2017 IEEE transactions on very large scale integration Vol.25 No.4
<P>Spin-transfer torque random access memory (STT-RAM) technology has emerged as one of the most promising memory technologies owing to its nonvolatility, high density, and low-leakage power characteristics. However, STT-RAM has certain drawbacks such as high write energy consumption and limits to the number of write cycles. To enable the adoption of STT-RAM in the implementation of cache memories, new cache hierarchy management policies are required to overcome such drawbacks. In this brief, we evaluated several cache hierarchy management policies in the context of static random access memory L1 caches and an STT-RAM L2 cache. We found that a nonexclusive policy is superior to noninclusive and exclusive policies in terms of energy consumption and endurance. We also propose a sub-block-based management policy because the write energy consumption and endurance are proportional and inversely proportional to the amount of written data, respectively. A combination of the proposed policy with a nonexclusive policy reduces the L2 cache energy consumption by 33.3% (31.5%) and improves the lifetime by 56.3% (56.8%) in a single-core (quad-core) system.</P>
Error surface-aware modeling algorithm for quarter-pixel motion estimation
Junsang Cho,Suh, J. W.,Gwanggil Jeon,Jooheung Lee,Jechang Jeong IEEE 2012 IEEE transactions on consumer electronics Vol.58 No.3
<P>In this paper, an error surface-considered modeling algorithm for quarter-pixel motion estimation during video encoding is presented. We previously proposed two algorithms: a model-based quarter-pixel motion estimation (MBQME) algorithm and a hierarchical model-based quarter-pixel motion estimation (HMBQME) algorithm. MBQME is an interpolation-free algorithm that has a minimum motion estimation time, while HMBQME has selective interpolation according to the decision process. Consequently, the peak signal-to-noise ratio (PSNR) for HMBQME is better than that of MBQME, but the motion estimation time is also increased. As an alternative method, we propose an error surface-considered modeling algorithm. In this scheme, the tendency of the error surface is first assessed. Using the strength of the edge at the error surface, we can classify the error surface region as plain or textured. For plain regions, interpolation-free and simple-structured modeling is appropriate for the quarter-pixel motion estimation method. In this case, we modified conventional mathematical modeling algorithm suitable for plain region. For textured regions, additional interpolation is needed for more accurate modeling. We calculate the half-pixel SAD values and perform more accurate modeling so as to find the best motion vector (MV). The experimental results show that the proposed scheme has better PSNR performance than any previous algorithms with minimum motion estimation time.</P>