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The Coefficients Scaling for Hardware Implementation of the Lorenz Chaos System
Han, Gunhee THE RESEARCH INSTITUTE OF ASIC DESIGN YONSEI UNIVE 1999 Journal of the Research Institute of ASIC Design Vol.6 No.1
The Lorenz chaos system is one of the best known chaos system. It is based on the two integrator loop and an additional feedback loop which consists of an integrator and two multipliers. The original Lorenz equation requires large coefficients ratio (21) and it has large solution space. These are undesirable properties when the system is implemented on silicon, because these implies large silicon area, high power supply voltage. In this paper, more degrees of freedom are incorporated by adding coefficients which reduce the coefficient ratio and the dynamic range. The coefficient ratio is reduced to 8 and the dynamic range is independently controlled. The coefficient ratio and the dynamic range are practical for any implementation technique such as current mode, Gm-C, or Switched-Capacitor circuit.
Bulk Switching Instrumentation Amplifier for a High-Impedance Source in Neural Signal Recording
Myungjin Han,Boram Kim,Yi-An Chen,Hyojung Lee,Seung-Han Park,Eunji Cheong,Jongill Hong,Gunhee Han,Youngcheol Chae IEEE 2015 IEEE Transactions on Circuits and Systems II: Expr Vol. No.
<P>Flicker noise is the most crucial issue in an instrumentation amplifier (IA) for neural recordings because low-frequency neural signals overlap with the frequency of the amplifier's flicker noise. A Chopping technique, often used to reduce the flicker noise, is not desirable for high-impedance input sources due to the charge injection and clock feedthrough from the MOSFETs of the input chopper to the signal source, resulting in a significant increase in the total input-referred noise. Whereas MOSFETs have less flicker noise at the moment of turning on, and the intrinsic flicker noise can be then reduced by turning on and off the MOSFETs in the IA. This brief proposes a bulk switching IA, which can avoid the input current noise. A prototype IA is implemented in a 65 nm CMOS occupying 0.053 mm<SUP>2</SUP>, and it achieves the input-referred noise of 0.74 μ<SUB>Vrms</SUB> (local field potential) for 100 k Ω source impedance, a 3.3 times reduction compared with that of the chopper IAs, while consuming only 3.96 μW from a 1.2 V supply.</P>
유연한 지지 구조와 유체 동압 베어링으로 지지되는 HDD의 회전 유연 디스크-스핀들 시스템에 대한 유한 요소 고유 진동 해석
한재혁(Han, Jaehyuk),장건희(Jang, Gunhee) 한국소음진동공학회 2005 한국소음진동공학회 논문집 Vol.15 No.3
The free vibration of a spinning flexible disk-spindle system supported by hydro dynamic bearings (HDB) in an HDD is analyzed by FEM. The spinning flexible disk is described using Kirchhoff plate theory and von Karman non-linear strain, and its rigid body motion is also considered. It is discretized by annular sector element. The rotating spindle which includes the clamp, hub, permanent magnet and yoke, is modeled by Timoshenko beam including the gyroscopic effect. The flexible supporting structure with a complex shape which includes stator core, housing, base plate, sleeve and thrust pad is modeled by using a 4-node tetrahedron element with rotational degrees of freedom to satisfy the geometric compatibility. The dynamic coefficients of HDB are calculated from the HDB analysis program, which solves the perturbed Reynolds equation using FEM. Introducing the virtual nodes and the rigid link constraints defined in the center of HDB, beam elements of the shaft are connected to the solid elements of the sleeve and thrust pad through the spring and damper element. The global matrix equation obtained by assembling the finite element equations of each substructure is transformed to the state-space matrix-vector equation, and the associated eigen value problem is solved by using the restarted Arnoldi iteration method. The validity of this research is verified by comparing the numerical results of the natural frequencies with the experimental ones. Also the effect of supporting structures to the natural modes of the total HDD system is rigorously analyzed.
Low Voltage, Low Power, Inverter-Based Switched-Capacitor Delta-Sigma Modulator
Chae, Youngcheol,Han, Gunhee IEEE 2009 IEEE journal of solid-state circuits Vol.44 No.2
<P> An operational transconductance amplifier (OTA) is a major building block and consumes most of the power in switched-capacitor (SC) circuits, but it is difficult to design low-voltage OTAs in scaled CMOS technologies. Instead of using an OTA, this paper proposes an inverter-based SC circuit and its application to low-voltage, low-power delta-sigma <TEX>$(\Delta \Sigma)$</TEX> modulators. Detailed analysis and design optimizations are also provided. Three inverter-based <TEX>$\Delta \Sigma$</TEX> modulators are implemented for an implantable pacemaker, a CMOS image sensor, and an audio codec. The modulator-I for an implantable pacemaker achieves 65-dB peak-SNDR for 120-Hz bandwidth consuming 0.73 <TEX>$\mu$</TEX> W with 1.5 V supply. The modulator-II for a CMOS image sensor implemented with 320-channel parallel ADC architecture achieves 63-dB peak-SNDR for 8-kHz bandwidth consuming 5.6<TEX>$\ \mu$</TEX>W for each channel with 1.2-V supply. The modulator-III for an audio codec achieves 81-dB peak-SNDR with 20-kHz bandwidth consuming 36 <TEX>$\mu$</TEX>W with 0.7-V supply. The prototype <TEX>$\Delta \Sigma$</TEX> modulators achieved high power efficiency maintaining sufficient performances for practical applications. </P>