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McSimA+ 시뮬레이터를 활용한 DRAM 파라미터별 성능 민감도 연구
조현윤(Hyunyoon Cho),노유환(Yuhwan Ro),이어진(Eojin Lee),안정호(Jung Ho Ahn) 대한전자공학회 2016 대한전자공학회 학술대회 Vol.2016 No.6
The reduction of DRAM latency is important to improve performance on the modern computer system. Furthermore, the portion of power consumption by DRAM is increasing significantly with expanding the capacity of DRAM. However, there are no appropriate guides on what and how to solve these problems. This paper proposes new guidelines to improve system performance and power, through a quantitative experiment for all DRAM parameters. With our work, we find that the system performance is most sensitive to tCL parameter change, and standby power is the most significant portion of the whole DRAM power.