Clock-gating 을 고려한 저전력 8-bit 마이크로프로세서 설계에 관한 연구

전종식(Jong Sik Jeon) 한국전자통신학회 2007 한국전자통신학회 논문지 Vol.2 No.3

본 논문에서는 전력 소비를 감소시킬 수 있는 클럭게이팅 기법을 제안하여 8bit RISC 마이크로프로세서를 설계하였다. 제안된 설계 방법의 타당성을 검토하기 위해서 저전력을 고려하지 않은 8비트 마이크로프로세서와 클록 게이팅을 이용한 저전력 8비트 마이크로프로세서를 설계하여 소모 전력을 비교하였다. 기존의 마이크로 프로세서와 저전력으로 설계된 마이크로프로세서와의 소모 전력을 비교한 결과 시간에 대하여 비교하였을 경우 동적 소모 전력에 대하여 21.56% 감소를 얻을 수 있었다. In this paper, to design 8 bit RISC Microprocessor, a method of Clock Gating to reduce electric power consumption is proposed. In order to examine the priority, the comparison results of between a 8 bit Microprocessor which is not considered Low Power consumption and which is considered Low Power consumption using a methods of Clock Gating are represented. Within the a few periods, the results of comparing with a Microprocessor not considered the utilization of Clock Gating shows that the reduction of dynamic dissipation is minimized up to 21.56%.

유전자 알고리듬을 사용한 저전력 모듈 선택

전종식(Jong Sik Jeon) 한국전자통신학회 2007 한국전자통신학회 논문지 Vol.2 No.3

본 논문에서는 유전자 알고리듬을 이용하여 전력, 면적, 속도를 고려한 저전력 모듈 선택을 제안한다. 제안한 알고리듬은 최적의 모듈 선택을 통해서 전력 소모를 최소화 할 수 있다. 비교 실험에서는 최적 모듈 선택을 고려한 알고리듬은 최대 전력 감소량은 26.9 %를 얻을 수 있었고, 반면에 최소 전력 감소량은 9.0% 얻었다. 모든 벤치마크 평균 전력 감소량은 15.525%가 되었다. In this paper, we present a optimal module selection using genetic algorithm under the power, area, delay constraint. The proposed algorithm use the way of optimal module selection it will be able to minimize power consumption. In the comparison and experimental results, The proposed application algorithm reduce maximum power saving up to 26.9% comparing to previous non application algorithm, and reduce minimum power saving up to 9.0%. It also show the average power saving up to 15.525% and proved the power saving efficiency.

비트평면 패턴을 이용한 최적 이진화 방법

김하식(Ha-Sik Kim),김강(Kang Kim),조경식(Kyung-Sik Cho),전종식(Jong-Sik Jeon) 한국컴퓨터정보학회 2001 韓國컴퓨터情報學會論文誌 Vol.6 No.4

본 연구는 영상처리의 전처리과정으로 중요한 영상 이진화를 위해 사용되는 전역임계값 결정을 위한 새로운 접근 방법을 제안하였다. 제안한 알고리즘은 원 영상의 전체적인 윤곽을 가장 많이 포함하는 최상위 비트평면을 사용하여 영상을 중복되지 않는 두 영역으로 구분한 뒤, 두 영역의 평균 밝기 값의 차이로 임계값을 결정하는 전역 임계화 방법이다. 실험결과 제안한 방법은 인위적인 초기값 설정을 필요로 하지 않으며, 상대적으로 계산량이 적고 원 영상의 윤곽을 양호하게 보존하는 이진영상을 얻을 수 있었다. A new approach for determining global threshold value for image binarization is proposed in this paper. In the proposed algorithm, bit-plane information which involve the shapes of original image is used for dividing image into two parts object and background, and then compared each average values. Optimal threshold value are selected in center of two averages. Proposed method is relatively simple but robust and achieved good results in continuous tone images and document image.

MPLS Traffic Engineering의 표준 기술

김강(Kang Kim),전종식(Jong-Sik Jeon),김하식(Ha-Sik Kim) 한국컴퓨터정보학회 2001 韓國컴퓨터情報學會論文誌 Vol.6 No.4

MPLS(Multi protocol Label Switching)는 Network Traffic 흐름의 속도를 높이고 관리하기 쉽게 하기 위한 표준 기술이다. MPLS는 정해진 Pack 열에 특정 경로를 설정하는 것에 관여하고, 각 Pack 내에는 라벨이 있어 Router 입장에서는 그 Pack을 전달할 노드의 주소를 확인하여 소요시간을 절약한다. MPLS는 IP, ATM 및 프레임 릴레이 Network proto-col 등과 같이 작동한다.<br/> MPLS는 Network OSI 참조모델과 함께 3Layer가 아닌 Switching을 하는 2Layer에서 대부분의 Pack이 전달되게 한다. MPLS는 Traffic을 빠르게 움직이게 하며, QoS를 위한 Network관리를 쉽게 한다. 이런 이유에 MPLS 기술은 더 많고 특정한 Traffic을 전송하기 시작한 Network로 채택될 유망한 기술로 기대되고 있다. MPLS(Multi protocol Label Switching) is standard skill for added to speed and control the Network Traffic. MPLS concerned the routing protocol to relative Pack line, Each Pack composed label and node, saved the time to seek the address of node.<br/> MPLS worked IP, ATM and Network protocol of flame rely.<br/> MPLS is Network OSI suport model, 2Layer send to most of Packinsted of 3Layer Switching. MPLS is added speed Traffic of QoS and effective controled the Network.

보안정책 기반 침입탐지 시스템 모델 설계

김강(Kim Kang),전종식(Jong-Sik Jeon) 한국컴퓨터정보학회 2003 韓國컴퓨터情報學會論文誌 Vol.8 No.4

컴퓨터네트워크의 확대 및 인터넷 이용의 급격한 증가에 따른 부작용으로 컴퓨터 보안문제가 중요하게 대두되고 있다. 따라서, 침입자들로부터 위험을 줄이기 위해 침입탐지시스템에 관한 연구가 활발하다. 특히, 본 논문은 침입탐지시스템을 바탕으로 한 새로운 보안정책 기반 침입탐지 시스템 모델을 제안하고, 이를 설계 및 프로토타입을 구현하여 그 타당성을 보인다. 제안한 모델에서 보안정책 기반 침입탐지시스템들은 여러 컴퓨터에 분산되고, 분산된 보안정책 기반 침입탐지시스템들 중에서 어느 하나가 특정 프로세스에 의해 발생된 시스템 호출 순서 중 비정상적인 시스템 호출을 탐지한 경우에 이를 다른 보안정책 기반 탐지시스템들과 서로 동적으로 공유하여 새로운 침입에 대하여 대응책을 향상시킨다. Computer security is considered important due to the side effect generated from the expansion of computer network and rapid increase of the use of internet. Therefore, Intrusion Detection System has been an active research area to reduce the risk from intruders. Especially, The paper proposes a new Security Policy-based Intrusion Detection System Model, which consists of several computer with Intrusion Detection System, based on Intrusion Detection System and describes design of the Security Policy-based Intrusion Detection System model and prototype implementation of it. The Security Policy-based Intrusion Detection Systems are distributed and if any of distributed Security Policy-based Intrusion Detection Systems detect anomaly system call among system call sequences generated by a privilege process, the anomaly system call can be dynamically shared with Security Policy-based Intrusion Detection Systems. This makes the Security Policy-based Intrusion Detection Systems improve the ability of countermeasures for new intruders.

한국인 남성 불임환자에서 Y염색체내 미세결실의 분자유전학적 분석

윤현수,이정현,서주태,김해정,이동률,전종식,조정현,김문규,이무상,노성일,Yoon, Hyun-Soo,Lee, Jeong-Hen,Seo, Ju-Tae,Kim, Hae-Jung,Lee, Dong-Ryul,Jeon, Jong-Sik,Cho, Jung-Hyun,Kim, Moon-Kyoo,Lee, Moo-Sang,Roh, Sung-Il 대한생식의학회 1996 Clinical and Experimental Reproductive Medicine Vol.23 No.3

Genes on the long arm of Y chromosome, particularly interval 6, are believed to playa critical role in human spermatogenesis. The objective of this study was to validate a sequenced-tagged site(STS)-mapping strategy for the detection of Yq microdeletion and to use this method to determine the proportion of men with Yq microdeletions in idiopathic, obstructive, nonobstructive azoospermia, severe OATS and in normal males. We analyzed three STS markers mapped to interval 6 within long arm of the Y chromosome from 106 nonobstructive, 30 obstructive azoospermia, 15 severe OATS patients, and normal 42 males in Korean men. By PCR, we tested leukocyte DNA, for the presences of STS markers(DAZ, sY129 and sY134) and SRY gene as internal control. And PCR results were confirmed by Southern hybridization, and were investigated by SSCP analysis for DAZ gene mutation. None of 42 normal males and 30 obstructive azoospermia had microdeletions, Of the 15 severe OATS typed with DAZ, sY129 and sY134, 3(20.0%) patients failed to amplify 1 or more STS markers, and of the 106 nonobstructive azoospermia typed with DAZ, sY129 and sY134, 12(11.3%) patients failed to amplify 1 or more STS markers. From these results, high prevalence(12.4%) of Yq deletion(DAZ, sY129, sY134) in men with nonobstructive idopathic azoospermia and severe OATS were observed in Korean infertility patients. To avoid the infertile offspring by assisted reproductive technique using ICSI or ROSI, genetic diagnosis will be needed in IVF-ET program.

스위칭 동작 최소화를 통한 저전력 설계

전종식,김재진,김희석 청주대학교 산업과학연구소 1999 産業科學硏究 Vol.17 No.1

In this paper, We propose a high level synthesis method targeting low power consumption for data dominated CMOS circuits. The high level synthesis is divided into three basic tasks: scheculing, resource and register allocation. For lower power scheduling, we increase the possibility of reusing an input operand of functional units. For a scheduled data flow graph a compatibility graph for register and resource allocation is formed, and then a special weighted network is then constructed from the compatibility graph and the minimum cost flow algorithm is performed on the network th obtain the minimum power consumption data path assignment. The formulated problem is then solved optimally in polynomial time. This method reduces the switching activity. Experimental results show 14.6% power reduction in benchmark circuits.

Arithmetic Components를 위한 High-level 라이브러리 맵핑에 관한 연구

김희석,전종식,조남경 청주대학교 산업과학연구소 1997 産業科學硏究 Vol.15 No.2

In this paper, We propose 1-Greedy algorithm uses R T level functional behavior to perform mapping of a Source component onto another Target component of similar complexity. The complexity of this algorithm is O(mST*nS). The technique is well-suited for mapping regularly-structured datapath components. We demonstrate the HLLM approach on ALUs components. Our experimental results demonstrate the comprehensiveness and efficacy of the HLLM approach in mapping RT components. We describe the GENUS library environment and a user-interface in the HLLM system for performing RT level design.

파이프라인 IDCT 설계에 관한 연구

이원표,전종식,김희석 청주대학교 산업과학연구소 1999 産業科學硏究 Vol.17 No.1

In this paper, IDCT that can decode still and moving image is designed. For high performance of data processing, this system is applied pipelined architecture to IDCT system, designed in this paper, consists of datapath, controller and clock generator, and in order to test design area, processing time and power consumption, this system is compared the sequential IDCT system. As the result, the pipelined IDCT system processes 14 frames/sec for 352 × 240 size, therefore, that the pipelined IDCT system is prior to sequential IDCT system was found.

Graph clustering 알고리즘을 이용한 High-level 라이브러리 맵핑에 관한 연구

원충상,전종식 충주대 산업과학기술연구소 1998 産業科學論文集 Vol.6 No.-

In this paper, We propose Graph clustering algorithm uses RT level functional behavior to perform mapping of a Source component onto another Target component of similar complexity, The technique is well-suited for mapping regularly-structured datapath components. We demonstrate the HLLM approach on ALUs components. Our experimental results demonstrate the comprehensiveness and efficacy of the HLLM approach in mapping RT components. We describe the GENUS library environment and a user-interface in the HLLM system for performing RT level design.