새로운 구조를 가지는 Tunable Bandpass $\Sigma-\Delta$ Modulator

김재붕,조성익,Kim, Jae-Bung,Cho, Seong-Ik 대한전자공학회 2008 電子工學會論文誌-SD (Semiconductor and devices) Vol.45 No.2

본 논문에서는 선별된 IF 대역의 데이터 변환을 위하여 모듈레이터의 하나의 계수값에 의하여 IF 대역 중심주파수을 조절할 수 있는 새로운 2차 SC Bandpass $\Sigma-\Delta$ 모듈레이터 구조를 제안한다. 제안한 구조는 기존구조에 비하여 2차 형태의 잡음 전달함수를 임의로 변경할 수 있고, 중심주파수 조절를 위하여 기존구조는 가변이 가능한 2개의 계수값, 기본클럭외 다른 8개의 클럭이 필요한 반면 제안한 구조는 가변이 가능한 하나의 계수값과 기본 클럭만으로 주파수를 조절할 수 있다. In this paper, tunable SC(switched capacitor) 2nd order bandpass $\Sigma-\Delta$(Sigma-Delta) modulator with novel architecture that can adjust the IF band center frequency by one coefficient value is proposed for data conversion in the IF(Intermediate Frequency) band. Its architecture can optionally adjust all the 2nd order noise transfer function in comparison with the conventional architecture. In order to adjust the center frequency, the conventional architecture needs the two variable coefficient values, basic clock and eight clocks. On the other hand, the proposed architecture can adjust the center frequency by one variable coefficient value and basic clock only.

중간주파수 조절이 가능한 새로운 구조의 4차 SC Bandpass ${\sigma}-{\Delta}$ Modulator

김재붕,김강직,조성익,Kim, Jae-Bung,Kim, Kang-Jik,Cho, Seong-Ik 대한전자공학회 2009 電子工學會論文誌-SC (System and control) Vol.46 No.3

본 논문에서는 무선통신에서 데이터 변환을 위하여 2개의 계수 값에 의하여 중간 주파수를 조절할 수 있는 개선된 구조를 가지는 4차 SC Bandpass ${\sigma}-{\Delta}$ 모듈레이터 구조를 제안한다. 제안한 구조는 4차 형태의 잡음 전달함수를 원하는 형태로 변경할 수 있고, 또한 기존구조는 중간주파수 조절을 위한 다른 8개의 클록과 가변이 가능한 4개의 계수 값이 필요하지만 제안한 구조는 가변이 가능한 2개의 계수 값과 기본 클록만으로 중간주파수를 조절할 수 있다. In this paper, tunable 4th order SC(switched capacitor) bandpass ${\sigma}-{\Delta}$(Sigma-Delta) modulator with advanced architecture that can adjust the IF by two coefficient values is proposed for data conversion in the wireless communication. Its architecture can optionally adjust all the 4th order noise transfer function in comparison with the conventional architecture. In order to adjust the IF, the conventional architecture needs the four variable coefficients values, basic clocks and eight clocks. On the other hand, the proposed architecture can adjust the IF by two variable coefficient values and basic clocks only.

골 조직 치유과정에서 Collagen 막의 효과

김재붕,이재목,서조영,Kim, Jae-Bung,Lee, Jae-Mok,Suh, Jo-Young 대한치주과학회 1999 Journal of Periodontal & Implant Science Vol.29 No.2

Many researches have been reported that collagen as cellular stroma, matrix of grafting materials, mediator of agents for the purpose of promoting healing process invivo, but the responses in vivo were seen various. The goal of this experiment is to assess the effect of collagen on bony healing, through histological evaluation of implanted collagen on the calvarial defect in rats. 2-month-old Sprague-Dawley, 24 rats were used and 12 rats assigned to each group of control and test. Defect of 5mm in diameter was made on the calvarial bone with trephine bur. Following thorough saline rinse, defect of control group was left in empty and that of experimental group was filled with fibrillar collagen($COLLATAPE^{(R)}$, COLLA-TEC. INC. U.S.A.) soaked in saline. 3 rats in each group were sacrificed at 3, 7, 14, 21 days after operation respectively, and the tissue blocks were prepared for light microscope with H-E for evaluation of overall healing, with TRAP(tartrate resistant acid phosphatase) for evaluation of osteoclastic activity and with immunohistochemical staining for macrophages. The results were as follows : 1. In the control group, inflammatory responses were disappeared at day 14, but, in the experimental group inflammatory infiltrates were reduced at day 21. Thus, the experimental group showed more severe soft tissue inflammation than control group. 2. Both control and experimental group showed slight appositional growth at day 7 and gradual bony growth to 21th day. But, complete bony healing of the defect was not shown. There was no significant difference in bony healing between control and experimental group 3. Specific response of macrophages for implanted collagen was observed at day 14 in the experimental group. In conclusion, although fibrillar collagen caused inflammation of soft tissue during initial healing period, inflammatory responses by fibrillar collagen didn't inhibit bony regeneration and implanted collagen was biodegradaded by macrophages. Thus, we expect that fibrillar collagen can be used for useful mediator of graft materials or growth factors.

연산증폭기 공유 기법을 이용한 145μW, 87dB SNR을 갖는 저전력 3차 Sigma-Delta 변조기

김재붕,김하철,조성익,Kim, Jae-Bung,Kim, Ha-Chul,Cho, Seong-Ik 한국전기전자학회 2015 전기전자학회논문지 Vol.19 No.1

본 논문에서는 디지털 패스가 없는 연산증폭기 공유 기법을 이용한 $145{\mu}W$, 87dB SNR을 갖는 저전력 3차 Sigma-Delta 변조기를 제안한다. 기존 구조는 아날로그와 디지털 패스를 사용한 구조로 첫 번째 적분기의 계수가 작다는 단점을 지연된 피드포워드 패스를 추가하여 개선하였다. 제안한 구조는 디지털 패스를 제거하여 첫 번째 적분기의 계수를 크게 하였고 연상증폭기 공유 기법을 이용하여 전력소모가 기준 구조보다 적다. 전원전압 1.8V, 신호대역폭 20KHz, 샘플링 주파수 2.8224MHz 조건에서 $0.18{\mu}m$ CMOS 공정을 이용하여 제안한 구조의 시뮬레이션한 결과, SNR(Signal to Noise Ratio)은 87dB, 전력소비는 $145{\mu}W$이다. In this paper, a $145{\mu}W$, 87dB SNR, Low power 3rd order Sigma-Delta Modulator with Op-amp sharing is proposed. Conventional architecture with analog path and digital path is improved by adding a delayed feed -forward path for disadvantages that coefficient value of the first integrator is small. Proposed architecture has a larger coefficient value of the first integrator to remove the digital path. Power consumption of proposed architecture using op-amp sharing is lower than conventional architecture. Simulation results for the proposed SDM designed in $0.18{\mu}m$ CMOS technology with power supply voltage 1.8V, signal bandwidth 20KHz and sampling frequency 2.8224MHz shows SNR(Signal to Noise Ratio) of 87dB, the power consumption of $145{\mu}W$.

개선된 CTAT 보상을 가지는 저전압 CMOS Bandgap Voltage Reference

김재붕(Jae-Bung Kim),조성익(Seong-Ik Cho) 대한전기학회 2012 전기학회논문지 Vol.61 No.5

In this paper, a modified low-votlage CMOS bandgap voltage reference with CTAT compensation is presented. The proposed structure doesn"t use PTAT current. The proposed structure is more simple than the existing structure and doesn"t use the eighteen BJT. The modified low-votlage CMOS bandgap voltage reference with CTAT compensation has been successfully verified in a standard 0.18um CMOS process. The simulation results have confirmed that, with the minimum supply voltage of 1.25V, the output reference voltage at 549mV has a temperature coefficient of 12ppm/°C from 0°C to 100°C.

새로운 구조를 가지는 Tunable Bandpass Σ-Δ Modulator

김재붕(Jae-Bung Kim),조성익(Seong-Ik Cho) 대한전자공학회 2008 電子工學會論文誌-SD (Semiconductor and devices) Vol.45 No.2

본 논문에서는 선별된 IF 대역의 데이터 변환을 위하여 모듈레이터의 하나의 계수값에 의하여 IF 대역 중심주파수을 조절할 수 있는 새로운 2차 SC Bandpass Σ-Δ 모듈레이터 구조를 제안한다. 제안한 구조는 기존구조에 비하여 2차 형태의 잡음전달함수를 임의로 변경할 수 있고, 중심주파수 조절를 위하여 기존구조는 가변이 가능한 2개의 계수값, 기본클럭외 다른 8개의 클럭이 필요한 반면 제안한 구조는 가변이 가능한 하나의 계수값과 기본 클럭만으로 주파수를 조절할 수 있다. In this paper, tunable SC(switched capacitor) 2nd order bandpass Σ-Δ(Sigma-Delta) modulator with novel architecture that can adjust the IF band center frequency by one coefficient value is proposed for data conversion in the IF(Intermediate Frequency) band. Its architecture can optionally adjust all the 2nd order noise transfer function in comparison with the conventional architecture. In order to adjust the center frequency, the conventional architecture needs the two variable coefficient values, basic clock and eight clocks. On the other hand, the proposed architecture can adjust the center frequency by one variable coefficient value and basic clock only.

중간주파수 조절이 가능한 새로운 구조의 4차 SC Bandpass Σ-Δ Modulator

김재붕(Jae-Bung Kim),김강직(Kang-Jik Kim),조성익(Seong-Ik Cho) 대한전자공학회 2009 電子工學會論文誌-SC (System and control) Vol.46 No.3

본 논문에서는 무선통신에서 데이터 변환을 위하여 2개의 계수 값에 의하여 중간 주파수를 조절할 수 있는 개선된 구조를 가지는 4차 SC Bandpass Σ-Δ 모듈레이터 구조를 제안한다. 제안한 구조는 4차 형태의 잡음 전달함수를 원하는 형태로 변경할 수 있고, 또한 기존구조는 중간주파수 조절을 위한 다른 8개의 클록과 가변이 가능한 4개의 계수 값이 필요하지만 제안한 구조는 가변이 가능한 2개의 계수 값과 기본 클록만으로 중간주파수를 조절할 수 있다. In this paper, tunable 4th order SC(switched capacitor) bandpass Σ-Δ(Sigma-Delta) modulator with advanced architecture that can adjust the IF by two coefficient values is proposed for data conversion in the wireless communication. Its architecture can optionally adjust all the 4th order noise transfer function in comparison with the conventional architecture. In order to adjust the IF, the conventional architecture needs the four variable coefficients values, basic clocks and eight clocks. On the other hand, the proposed architecture can adjust the IF by two variable coefficient values and basic clocks only.

새로운 구조의 Tunable 4차 SC Bandpass Sigma-Delta 변조기

김재붕(Jae-Bung Kim),유남희(Nam-Hee Yoo),조성익(Seong-Ik Cho) 대한전기학회 2011 전기학회논문지 Vol.60 No.2

Tunable SC(Switched Capacitor) bandpass Σ-Δ(Sigma-Delta) modulator used in wireless system receiver occurs a signal attenuation according to tuning of center frequency in signal bandwidth. In this paper, tunable bandpass 4th order SC bandpass Σ-Δ modulator with novel structure is proposed for rejection of signal attenuation in signal bandwidth. The existing structure uses a ten variable coefficient values for rejection of signal reduction in the modulator. But the proposed structure only use a two variable coefficient values for rejection of signal attenuation in the modulator. Also, an adder and comparator is replaced with a comparator having 4 inputs in the modulator. Therefore, the existing structure has one more OP-AMP. The purposed modulator was designed in 0.18 ㎛ CMOS technology. The resolution of the modulator within 310 ㎑ bandwidth and 40 ㎒ sampling frequency under 6.67 ㎒, 10 ㎒ and 13.33 ㎒ intermediate frequency are over 10 bit.

새로운 FDPA 기법을 사용한 시그마-델타 변조기

정의훈,김재붕,조성익,Jung, Eui-Hoon,Kim, Jae-Bung,Cho, Seong-Ik 한국전기전자학회 2013 전기전자학회논문지 Vol.17 No.4

본 논문에서는 DAC(Digital to Analog Converter) 출력을 지연시켜 디지털 피드백 패스를 추가하는 FDPA 기법을 사용한 SDM(Sigma Delta Modulator)을 제안한다. 지연된 디지털 피드백 패스만을 추가하여 SDM의 해상도를 높이고 기존 구조의 아날로그 피드백 패스를 제거함으로써 기존 구조에 비해 사용되는 클록이 줄어들어 회로가 간단하다. 제안한 구조를 설계하기 위해 MATLAB 모델링을 이용하여 적분기의 최적 계수를 설정하였다. 설계된 SDM은 $0.18{\mu}m$ CMOS 공정을 사용하였고 신호 대역폭 20KHz, 샘플링 주파수 2.56MHz에서 81dB의 SNR, $220{\mu}W$의 전력을 소모한다. This paper presents a SDM using the FDPA technique. The FDPA technique is the added feedback path which is the delayed path of DAC output. The designed SDM increases the SNR by adding the delayed digital feedback path. The proposed SDM is easily implemented by eliminating the analog feedback path. Through the MATLAB modeling, the optimized coefficients are obtained to design the SDM. The designed SDM has a power consumption of $220{\mu}W$ and SNR(signal to noise ratio) of 81dB at the signal-bandwidth of 20KHz and sampling frequency of 2.56MHz. The SDM is designed using the $0.18{\mu}m$ standard CMOS process.

입력 범위를 개선한 FDPA 방식의 3차 시그마-델타 변조기

권익준,김재붕,조성익,Kwon, Ik-Jun,Kim, Jae-Bung,Cho, Seong-Ik 한국전기전자학회 2014 전기전자학회논문지 Vol.18 No.2

본 논문은 개선된 입력 범위를 갖는 FDPA(Feedback Delay Pass Addition) 방식의 3차 SDM(Sigma-Delta Modulator) 구조를 제안한다. 기존의 구조는 2차 SDM 구조에서 디지털 딜레이 패스만을 추가하여 3차 전달함수를 구현하였지만, 첫 번째 적분기로 피드백 하는 패스가 많아짐에 따라 입력 범위가 매우 작은 단점이 있다. 그러나 제안된 구조는 첫 번째 적분기로 피드백 하는 디지털 패스를 2차 적분기로 피드백 하여 입력 범위를 9dB 개선할 수 있었다 이를 이중 샘플링 기법을 통해 연산 증폭기 한 개 만으로 3차 SC SDM을 구현하였다. 공급전압 1.8V, 신호대역폭 20KHz, 오디오 대역 샘플링 주파수 2.8224MHz 조건에서 $0.18{\mu}m$ CMOS 공정을 이용하여 제안한 SDM을 시뮬레이션한 결과, SNR(Signal to Noise Ratio)은 83.8dB, 전력소비는 $700{\mu}W$, Dynamic Range는 82.8dB이다. In this paper, $3^{rd}$ SDM with FDPA(Feedback Delay Pass Addition) technique to improve the input range is proposed. Conventional architecture with $3^{rd}$ transfer function is just made as adding a digital delay path in $2^{nd}$ SDM architecture. But the input range is very small because feedback path into the first integrator is increased. But, proposed architecture change feedback path into the first integrator to the second integrator, so input range could be improved about 9dB. The $3^{rd}$ SC SDM with only one operational amplifier was implemented using double-sampling technique. Simulation results for the proposed SDM designed in $0.18{\mu}m$ CMOS technology with power supply voltage 1.8V, signal bandwidth 20KHz and audible sampling frequency 2.8224MHz show SNR(Signal to Noise Ratio) of 83.8dB, the power consumption of $700{\mu}W$ and Dynamic Range of 82.8dB.