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초퍼 연산증폭기와 다수의 정합 트랜지스터를 이용한 수중 전기장 센서용 저잡음 전치 증폭기 설계
배기웅,정현주,양창섭,한승환,정상명 한국센서학회 2022 센서학회지 Vol.31 No.2
With advancements in underwater stealth technology for naval vessels, new sensor configurations for detecting targets have been attracting increased attention. Latest underwater mines adopt multiple sensor configurations that include electric field sensors to detect targets and to help acquire accurate ignition time. An underwater electric field sensor consists of a pair of electrodes, signal processing unit, and preamplifier. For detecting underwater electric fields, the preamplifier requires low-noise amplification at ultra-low frequency bands. In this paper, the specific requirements for low-noise preamplifiers are discussed along with the experimental results of various setups of matched transistors and chopper stabilized operational amplifiers. The results showed that noise characteristics at ultra-low frequency bands were affected significantly by the voltage noise density of the chopper amplifier and the number of matched transistors used for differential amplification. The fabricated preamplifier was operated within normal design parameters, which was verified by testing its gain, phase, and linearity.
Characterization of a CMOS 135-GHz Low Noise Amplifier with Two Different Noise Measurement Methods
Doyoon Kim,Sooyeon Kim,Kiryong Song,Jungsoo Kim,Junghwan Yoo,Jae-Sung Rieh 대한전자공학회 2018 Journal of semiconductor technology and science Vol.18 No.4
A D-band low-noise amplifier (LNA) has been developed based on a 65-nm CMOS technology, which showed a measured peak gain of 16.1 dB at 134.5 GHz. The noise property of the fabricated amplifier was characterized with two different noise measurement techniques: the cryogenic Y-factor method and the N-times power method. The two methods showed a minimum value of the noise figure of 10.7 dB and 14.7 dB, respectively.
GPS용 RF Front-End 수신단을 위한 L 대역 저잡음 증폭기 개발
이병찬(Byeong-Chan Lee),손정택(Jeong-Taek Son),임정택(Jeong-Taek Lim),이재은(Jae-Eun Lee),송재혁(Jae-Hyeok Song),김준형(Joon-Hyung Kim),백민석(Min-Seok Baek),박종성(Jong-Seong Park),이은규(Eun-Gyu Lee),김철영(Choul-Young Kim) 한국전자파학회 2024 한국전자파학회논문지 Vol.35 No.2
GPS의 프론트-엔드 수신단에서는 잡음 지수가 매우 중요하며 잡음 지수가 낮고 크기가 작은 저잡음 증폭기를 요구한다. 본 논문에서는 0.18 μm CMOS 공정을 이용한 L 대역 저잡음 증폭기의 설계에 관한 내용이다. 저잡음 특성을 위해 입력단 직렬 인덕터를 제거하고 트랜지스터의 유효폭(effective width)을 늘려 임피던스 정합을 이루어 냈으며 작은 칩 크기를 위해 높은 인덕턴스를 요구하는 인덕터들을 적층 구조로 제작하였다. 제작된 저잡음 증폭기는 1.4 GHz부터 2.1 GHz에 이르는 대역에서 2.5 dB 이하의 잡음 지수, 10.57 dB 이상의 반사손실, 17.3 dB의 최고 이득, 1.05 mm×0.78 mm의 크기를 달성하였다. In the front-end receiver of a GPS, the noise figure is extremely important and requires a low-noise amplifier with a low noise figure and small size. This study aims to investigate the design of an L-band low-noise amplifier using the 0.18-μm CMOS process. For low-noise characteristics, the input series inductor was removed, the effective width of the transistor was increased to achieve impedance matching, and the inductors requiring high inductance had laminated structures with small chip sizes. The low-noise amplifier achieved a noise figure of less than 2.5 dB, a return loss of more than 10.57 dB, a peak gain of 17.3 dB, and a size of 1.05 mm×0.78 mm in frequency from 1.4∼2.1 GHz.
GPS용 RF Front-End 수신단을 위한 L 대역 저잡음 증폭기 개발
이병찬,손정택,임정택,이재은,송재혁,김준형,백민석,박종성,이은규,김철영 한국전자파학회 2024 한국전자파학회논문지 Vol.34 No.2
GPS의 프론트-엔드 수신단에서는 잡음 지수가 매우 중요하며 잡음 지수가 낮고 크기가 작은 저잡음 증폭기를 요구한다. 본 논문에서는 0.18 μm CMOS 공정을 이용한 L 대역 저잡음 증폭기의 설계에 관한 내용이다. 저잡음 특성을 위해입력단 직렬 인덕터를 제거하고 트랜지스터의 유효폭(effective width)을 늘려 임피던스 정합을 이루어 냈으며 작은 칩크기를 위해 높은 인덕턴스를 요구하는 인덕터들을 적층 구조로 제작하였다. 제작된 저잡음 증폭기는 1.4 GHz부터 2.1 GHz에 이르는 대역에서 2.5 dB 이하의 잡음 지수, 10.57 dB 이상의 반사손실, 17.3 dB의 최고 이득, 1.05 mm×0.78 mm의크기를 달성하였다. In the front-end receiver of a GPS, the noise figure is extremely important and requires a low-noise amplifier with a low noise figure and small size. This study aims to investigate the design of an L-band low-noise amplifier using the 0.18-μm CMOS process. For low-noise characteristics, the input series inductor was removed, the effective width of the transistor was increased to achieve impedance matching, and the inductors requiring high inductance had laminated structures with small chip sizes. The low-noise amplifier achieved a noise figure of less than 2.5 dB, a return loss of more than 10.57 dB, a peak gain of 17.3 dB, and a size of 1.05 mm×0.78 mm in frequency from 1.4∼2.1 GHz.
0.5-μm GaAs pHEMT 공정을 이용한 4.4∼5.0 GHz 저잡음 증폭기
손정택,임정택,이재은,송재혁,김준형,백민석,이은규,김철영 한국전자파학회 2023 한국전자파학회논문지 Vol.34 No.12
This paper discusses the design of a 4.4∼5.0 GHz low-noise amplifier (LNA) using a 0.5-μm GaAs pHEMT process. The transistor size was optimized to address the mismatch between optimal noise and input impedance owing to the unique noise sources of the transistor and parasitic characteristics, achieving a low noise figure with high input and noise optimal impedance matching without additional inter-stage loss components. The designed low-noise amplifier consumed 48 mW of power in the 4.4∼5.0 GHz range, demonstrating more than 23 dB of gain and a low noise figure of less than 0.9 dB. The size of the fabricated circuit was 1.8×1.4 mm2 .
C-Band GaN Dual-Feedback Low-Noise Amplifier MMIC with High-Input Power Robustness
성하욱,한성희,김성일,Ahn Ho-Kyun,Lim Jong-Won,김동욱 한국전자파학회 2022 Journal of Electromagnetic Engineering and Science Vol.22 No.6
In this paper, using the 0.2 μm ETRI GaN HEMT process, we developed a C-band GaN dual-feedback low-noise amplifier MMIC for an RF receiver module that requires high-input power robustness. By applying a feedback microstrip line at the source of the transistor and series resistor-capacitor (RC) feedback between the gate and the drain of the transistor, we obtained stable amplifier operation and a compromised impedance trace for both input impedance matching and noise matching while suppressing performance degradation of the maximum available gain and minimum noise figure. The developed low-noise amplifier MMIC, which implements simple matching cir- cuits by using biasing elements as matching elements, had a linear gain of more than 21.4 dB and a noise figure of less than 1.91 dB in the wide bandwidth of 4.3–7.4 GHz. Under the single-tone power test, the low-noise amplifier MMIC had an output P1dB of 14.3–20.1 dBm, and the two-tone intermodulation distortion measurement exhibited an input third-order intercept point (IIP3) of 2.2–5.6 dBm in the same frequency range as the above.
Size efficient low-noise amplifier for 2.4 GHz ISM-band transceiver
Jhon, Hee-Sauk,Jung, Hakchul,Jeon, Jongwook,Koo, MinSuk,Park, Byung-Gook,Lee, Jong Duk,Shin, Hyungcheol Wiley Subscription Services, Inc., A Wiley Company 2009 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS Vol.51 No.10
<P>This letter presents the implementation technique to reduce circuit area in designing 2.4 GHz CMOS low-noise amplifier (LNA) using size efficient inductors. We applied a vertically shunt (M6/M5) and a 3-D helical inductor to input and output matching network to obtain low noise figure and to save silicon area, simultaneously. Because these inductors have smaller area occupation, overall Si area was reduced. Moreover, the feedback capacitor, C<SUB>f</SUB> is used to compensate the gain degradation from the high resistive 3-D helical inductor at the LNA output stage. The proposed LNA has a gain of 12.5 dB, noise figure (NF) of 2.72 dB, and −5 dBm IIP3, whereas dissipating 5.3 mA from 1.5 V supply. Without any degradation in terms of circuit performance, the size of proposed LNA is reduced by 49.5% compared with that using the conventional asymmetric inductors. For low cost, the LNA has been fabricated using a 0.18 μm mixed-signal CMOS process with top metal thickness of 0.84 μm. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2304–2308, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24600</P>
Design Method for Active-shunt-feedback Type Inductorless Low-noise Amplifiers in 65-nm CMOS
Toshiyuki Inoue,Akira Tsuchiya,Keiji Kishine 대한전자공학회 2020 Journal of semiconductor technology and science Vol.20 No.2
We demonstrated low-power and compact active-shunt-feedback type inductorless low-noise amplifiers (LNAs) in 65-nm CMOS. We pointed out the importance of considering an intermediate-node voltage in the LNA, and proposed a design method focusing on the intermediate voltage. The influence of the intermediate voltage upon the gain and noise figure was examined by a circuit simulator, and it was clarified that the intermediate voltage of VDD/2 was appropriate for high gain and low noise figure. Based on the proposed method, the active-shunt-feedback type LNA was fabricated in a 65-nm CMOS chip. The figure-of-merit considering the power, gain, bandwidth, noise factor, and linearity improved by 6 in comparison with that of the conventional 0.13-mm CMOS type.
Jhon, Hee-Sauk,Jung, Hakchul,Koo, Minsuk,Song, Ickhyun,Shin, Hyungcheol Wiley Subscription Services, Inc., A Wiley Company 2009 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS - Vol.51 No.5
<P>A low supply voltage and highly linear subthreshold CMOS low noise amplifier (LNA) for 2.4 GHz wireless sensor network applications is presented in this letter. We applied multiple gated transistor (MGTR) technique in subthreshold region to compensate the linearity degradation of low supply cascode topology. Moreover, the feedback capacitor, C<SUB>f</SUB> is used to enhance the power gain of amplifier without additional dc-power dissipation. The proposed LNA has gain of 13.1 dB, noise figure (NF) of 3.8 dB, and −2.5 dBm IIP3 while dissipating only 0.49 mW from 0.7 V supply. The LNA has been designed using a 0.13 μm 1P8M standard CMOS process with top metal thickness of 3.3 μm. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 1316–1320, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24333</P>
김윤영,문성익,허광삼,양두영 濟州大學校 産業技術硏究所 2000 산업기술연구소논문집 Vol.11 No.1
In this paper, A down converter to convert RF signal into IF signal is designed at the WLL basestation. It consists of low noise amplifier module and down mixer module. The low noise amplifier module is composed of threestage and a feedback circuit is added in the first-stage low noise amplifier in order to obtain unconditional stability and good flatness. The configuration of the down mixer module is a single-ended type gate mixer. For the good isolation characteristic of each port, a bandpass filter and a lowpass filter are inserted in the input and output port. To design the down converter without the IF power amplifier. it is important to maximize conversion gain. So the down converter of this paper is designed for the purpose of obtaining a high conversion gain. From the results, the IF output power is -12.68dBm when the LO and the RF power level are 7dBm and -80dBm. respectively. Also when the LO power level is 7dBm. PldB is -0.19dBm. and the RF input power range shows 70dB on wide operating range.