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Feedforward 구조를 이용한 광대역 SiGe HBT 가변 이득 증폭키의 설계 및 제작
채규성,김창우,Chae, Kyu-Sung,Kim, Chang-Woo 한국통신학회 2007 韓國通信學會論文誌 Vol.32 No.5A
피드포워드 방식을 이용하여 광대역, 선형 이득 제어 특성을 갖는 SiGe HBT 가변 이득 증폭기를 설계 및 제작하였다. 가변 이득 증폭기는 능동 발룬, 차동형 주 증폭기, 피드포워드 블록, 전압 조절부로 구성 되었으며, 주 증폭기와 피드포워드 블록의 신호가 역위상으로 상쇄되어 광대역의 선형 이득 제어가 가능하도록 각 부분을 최적화 시켰다. 설계된 가변 이득 증폭기는 STMicroelectronics사(社)의 0.35 ${\mu}m$ Si-BiCMOS 공정을 이용하여 제작하였다. 제작 및 측정 결과, 피드포워드 방식의 가변 이득 증폭기는 4 GHz($4\;GHZ{\sim}8\;GHz$)의 광대역 특성을 나타내었다. 또한, 제작된 가변 이득 증폭기는 6 GHz에서 9.3 dB의 최대 이득과 0.6 - 2.6 V의 조절 전압 인가시 19.6 dB의 이득 조절 범위 특성을 나타내었으며, 8 GHz에서 -3 dBm의 출력 전력 특성을 각각 나타내었다. Broadband monolithic SiGe HBT variable gain amplifier with a feedforward configuration have been newly developed to improve bandwidth and dB-linearly controlled gain characteristics. The VGA has been implemented in a $0.35-{\mu}m$ BiCMOS process. The VGA achieves a dynamic gain-control range of 19.6 dB and a 3-dB bandwidth of 4 GHz ($4{\sim}8\;GHz$) with the control-voltage range from 0.6 to 2.6 V. The VGA produces a maximum gain of 9.3 dB at 6 GHz and a output power of -3 dBm at 8 GHz.
A SiGe HBT Variable Gain Driver Amplifier for 5-GHz Applications
채규성,김창우,Chae Kyu-Sung,Kim Chang-Woo The Korea Institute of Information and Commucation 2006 韓國通信學會論文誌 Vol.31 No.3A
A monolithic SiGe HBT variable gain driver amplifier(VGDA) with high dB-linear gain control and high linearity has been developed as a driver amplifier with ground-shielded microstrip lines for 5-GHz transmitters. The VGDA consists of three blocks such as the cascode gain-control stage, fixed-gain output stage, and voltage control block. The circuit elements were optimized by using the Agilent Technologies' ADSs. The VGDA was implemented in STMicroelectronics' 0.35${\mu}m$ Si-BiCMOS process. The VGDA exhibits a dynamic gain control range of 34 dB with the control voltage range from 0 to 2.3 V in 5.15-5.35 GHz band. At 5.15 GHz, maximum gain and attenuation are 10.5 dB and -23.6 dB, respectively. The amplifier also produces a 1-dB gain-compression output power of -3 dBm and output third-order intercept point of 7.5 dBm. Input/output voltage standing wave ratios of the VGDA keep low and constant despite change in the gain-control voltage.
900 ㎒ 대역 고선형 CMOS 상향 주파수 혼합기 설계
장진석(Jin-suk Jang),채규성(Kyu-sung Chae),윤상웅(Sang-woong Yoon),김창우(Chang-woo Kim) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.11
A double-balanced frequency up-convener using the Gilbert cell structure has been designed with the TSMC 0.18 ㎛ CMOS library. The frequency up-converter consists of a core, IF balun, and LO balun block. In the core block, 4 source degeneration resistors are used to improve the mixer’s linearity. The frequency up-converter exhibits 12 ㏈ conversion gain with a 0 ㏈m P1㏈ for IF power of -11 ㏈m and LO power of 0 ㏈m inputs.
구광회(Kwang-Hoe Koo),채규성(Kyu-Sung Chae),윤상웅(Sang-Woong Yoon),김창우(Chang-Woo Kim) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.11
A quadrature voltage controlled oscillator(QVCO) with MOS-varactors has been designed for X-band applications. The QVCO consists of two cross -coupled differential cores. Using the TSMC CMOS libraries. harmonic balance simulation has been performed with the Agilent’s ADS. The QVCO exhibits the frequency tuning range from 7.03 ㎓ to 10.25 ㎓ with phase noise from -95 ㏈c/㎐ to -105 ㏈c/㎐ at an 1 ㎒-offset frequency. The total bias current is 49.6 ㎃ including four buffer amplifiers.