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A Vertical Double-Diffused MOSFET
김종오,최연익,손호태,성만영,Kim, Jong-Oh,Choi, Yearn-Ik,Sohn, Ho-Tae,Sung, Man-Young The Institute of Electronics and Information Engin 1986 전자공학회논문지 Vol.23 No.6
In this paper, we discuss fabrication and characteristics of the Vertical Double diffused MOS(VDMOS) transistor. The epi layers of starting wafers are 18~22\ulcorner in thickness and 8~12\ulcornercm in resistivity. The channel regions are defined through the self-aligned double diffusion process. The characteristics of the fabricated VDMOS are breakdown voltage of 240V, threshold voltage of 2V, on-resistance of 226\ulcornerand transconductance of 3x10**-3 mho.