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Fabrication of Superjunction Trench Gate Power MOSFETs Using BSG-Doped Deep Trench of p-Pillar
김상기,박훈수,나경일,유성욱,원종일,구진근,채상훈,박형무,양일석,이진호 한국전자통신연구원 2013 ETRI Journal Vol.35 No.4
In this paper, we propose a superjunction trench gate MOSFET (SJ TGMOSFET) fabricated through a simple p-pillar forming process using deep trench and boron silicate glass doping process technology to reduce the process complexity. Throughout the various boron doping experiments, as well as the process simulations, we optimize the process conditions related with the p-pillar depth, lateral boron doping concentration, and diffusion temperature. Compared with a conventional TGMOSFET, the potential of the SJ TGMOSFET is more uniformly distributed and widely spread in the bulk region of the n-drift layer due to the trenched p-pillar. The measured breakdown voltage of the SJ TGMOSFET is at least 28% more than that of a conventional device.
수소 열처리를 이용한 고신뢰성 트렌치 게이트 MOSFET
김상기,노태문,박일용,이대우,양일석,구진근,김종대 한국진공학회 2002 Applied Science and Convergence Technology Vol.11 No.4
고신뢰성 트렌치 게이트 MOSFET을 제작하기 위해 트렌치 코너를 pull-back 공정과 수소 열처리 공정을 이용하여 트렌치 코너를 둥글게 만드는 기술을 개발하였고 이를 이용하여 균일한 트렌치 게이트 산화막을 성장시킬수 있었다. 그 결과 수소 열처리 하기 전에 항복전압이 29 V인 것이 수소 열처리한 후 약 36 V로 증가하여 항복 전압에서 약 25% 향상되었다. 그리고 트렌치 게이트를 이용한 MOSFET에서 트렌치 셀이 약 45,000개 일때 게이트와 소스에 10 V를 인가했을 때, 드레인 전류는 약 45.3 A를 얻었고, 게이트 전압의 10 V, 전류를 5 A를 인가한 상태에서 On-저항은 약 55 m$\Omega$ 얻었다. A new technique for highly controllable trench corner rounding at the top and bottom of the trench using pull-back and hydrogen annealing has been developed and investigated. The pull-back process could control the trench corner rounding radius at the top comers of the trench. The silicon migration generated by hydrogen annealing at the trench coiners provided (111) and (311) crystal planes and gave a uniform gate-oxide thickness, resulting in high reliable trench DMOSFETs with highly breakdown voltages and low leakage currents. The breakdown voltage of a trench DMOSFET fabricated using hydrogen annealing was increased by 25% compared with a conventional DMOSFET. The reasonable drain current of 45.3 A was obtained when a gate voltage of 10 V was supplied. The on-resistance of the trench gate DMOSFET fabricated using the trench cell of 45,000 was about 55 m(at a gate voltage of 10 V under a drain current of 5 A.
Gelatin에 Butyl Methacrylate 그라프트 공중합체의 합성과 생체적합성
김상기,김공수 대한의용생체공학회 1990 의공학회지 Vol.11 No.1
The grafting of butyl methacrylate onto gelatin was investigated by potassium persulfate(KPS) redox system in aqueous solution. The optimum conditions of grafting were observed, and the physical property and the biocolnpatibility of graft copolymer membrane were examined. The gas permeability and the biodegradation by bacteria were decreased with the grafting percentage increased, and tensile strength increased with the grafting percentage increased.
김상기,박일용,구진근,김종대 한국전기전자재료학회 2002 전기전자재료학회논문지 Vol.15 No.10
Linearly graded profiles on the field area oxide are frequently used in power integrated circuits to reduce the surface electric field when power devices are operated in forward or reverse blocking modes. It is shown here that tapered windows can be made using the difference of etch rates between the bottom and the top layer of TEOS film. Annealed TEOS films are etched at a lower rate than the TEOS film without annealing Process. The fast etching layer results in window walls having slopes in the range of 25$^{\circ}$∼ 80$^{\circ}$ with respect to the wafer surface. Taper etching technique by annealing the TEOS film applies to high voltage LDMOS, which is compatible with CMOS process, due to the minimum changes in both of design rules and thermal budget.