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RISS 인기검색어
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- 저자 : 趙英一 (검색결과 667 건)
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적외선 분광광도계에 의한 혈중 Halothane의 측정법에 관한 연구
조영일 인제대학교 1985 仁濟醫學 Vol.6 No.2
수술 환자의 혈중 halothane의 농도를 간단, 신속히 얻을 수 있는 방법으로서 microcomputer controlled infrared spectrometer에 시료가열 기화장치를 부착하여 실험하였다. For the purpose of presenting simple and swift method for measuring halothane concentration in blood of anesthetic patients, the author conducted an experiment using personally designed sample heating and evaporating apparatus attached to microcomputer controlled infrared spectrometer which is able to be operated relatively with ease. The obtained results were as follows; 1.Specifically designed sample heating and evaporating apparatus was made to be introduced blood sample to the microcomputer controlled infrared spectrometer with controlling temperature for absolute evaporation and dehumidification. 2.The optimal heating temperature forhalothane was 54℃. The sensitivity and reliability of this apparatus were much high as measurement error 3.6%, mean deviation of repeatability 4.0%, standard deviation of repeatability 4.6% and mean recovery rate 96.0%. 3.Decreased rate of halothane concentration in blood by the duration after operation compared to the value at the time just after operation was 45.2% at 30 minutes, 68% at 1 hour, 83.1% at 2 hours and 92.1% at 4 hours. The halothane concentration in blood was showed increasing tendency with the anesthetic time after 1 hour from the end of operation. 4.The duration from anesthesia with halothane to awake state was showed prolonging tendency with the anesthetized time. The range of halothane concentration in blood at awake state was 8.3~15.4 ppm.
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RISC 프로세서에서 분기문에 의한 Pipeline Bubbles을 방지하는 방법
趙榮一 水原大學校 1994 論文集 Vol.12 No.-
Conditional branch instructions are becoming a major obstacle to the increasing of RISC processor performance, since they can break the smooth flow of instruction; the issuing of instructions after a branch instruction must often wait until the condition is resolved. This paper proposes a hardware scheme which has a duplicated fetching logic to reduce the penalty imposed by conditional branch instructions. The proposed scheme has a buffer to maintain states of a process, which supports the precise interrupt. We make use of two code segments to measure the performance and their results were compared with those of the delayed branch. The result shows that the proposed scheme reduces the branch penalty extremely.
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조영일 水原大學校 2012 論文集 Vol.26 No.-
Since the area occupied by cache memories on processor chips continues to grow, an increasing percentage of power is consumed by memory. Reducing the sizes of on-chip caches is not the answer because higher miss rates result in performance loss and an increase in power consumed by external buses. In order to achieve higher performance and lower power consumption, data compression should be applied at cache memories. The higher performance results because by storing data in compressed form we can store greater amounts of it and therefore maximize the hits to the cache. By studying the behaviour of general programmes, it was observed that over 50% of bytes in a data cache are zero-valued. To reduce this waste of zero-valued spaces in a data cache, an overlapped cache scheme, which allows one cache line entry to hold up to two cache lines, is proposed. Experimental results show that, for SPEC2000 benchmarks, the proposed design reduces cache misses by 29% on average over a conventional direct-mapped cache.
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Local Microprogram의 병렬 수행의 최대화
조영일,임인칠 대한전자공학회 1984 전자공학회지 Vol.21 No.3
This paper suggests an algorithm which can perform microoperations (MO'S) in parauel by considering concurrency of MO'S and resource allocation in horizontal microprogams. The algorithm can be obtained the result which reduces execution time and the space of control memory in microprogrammed digital systems by minimizing the total number of microinctructions by combining MO'5, which can be performed in paiallel by assigning a weight to each MO in the SLM (straight line microprogram), into a microinstruction. Horizontal microprogram에서 MO'S(microoper&titans)의 concurrency와 resource의 할당을 고려하여 MO'S을 병렬로 수행할 수 있는 알고리즘을 제안한다. 본 알고리즘은 SLM(straight line microprogram) 상에 있는 각 MO에 weight를 부여함으로써 병렬 실행될 수 있는 MO'S을 1개의 MI(microinstruction)으로 결합하여 전체 MI수를 최소화시킴으로써 실행 시간과 microprogramed 디지탈 시스템의 제어기억장치 크기(space)를 감소시키는 결과를 얻을 수 있다.
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조영일 수원대학교 기초과학연구소 1993 基礎科學論文集 Vol.2 No.-
VLIW architectures are reduced instruction set machines with a large number of parallel, pipelined functional unit but only a single thread of control. But, traditional compilers could not find enough parallelism in scientific programs to utilize a VLIW effectively. This paper proposes a new compiling technique which schedules instructions beyond a basic block to enhance the parallelism. The compiler translates scientific programs into highly parallel machine code for VLIWs, achieving order-of-magnitude-speed-ups over traditional scalar architectures.
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Microprogrammed 디지털 시스템의 제어 기억 용량의 최소화
조영일,임인칠 대한전자공학회 1984 전자공학회지 Vol.21 No.3
Microprogrammed 디지탈 시스템에서 재프로그램을 위한 가변성을 고려한 제어기억장치의 비트 폭을 최소화시키는 새로운 알고리즘을 제시한다. 본 알고리즘은 비트 폭을 최소화시킴과 동시에 weight가 높은 MOP에 고유영역을 부여함으로써 비트 최소화 과정시에 수반되는 가변성의 손실을 보상할 수 있다. 또 본 알고리즘을 프로그램하여 종래의 연구결과와 비교 검토하여 비트 감소와 가변성이 개선된 것을 중명하였다. This paper suggests a new algorithm which minimizes the bit dimension of control memory considering the flexibility for reprogramming in the microprogrammed digital systems. The algorithm can not only minimize the bit dimension but also compensate the loss of flexibility by giving a highest MOP the unique field in the process of bit minimization. Also, programming the algorithm, that result and previous works are compared and reviewed. Then the bit reduction and the improvement of flexibility are proved.
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趙榮一 수원대학교 산업기술연구소 1988 산업기술연구소논문집 Vol.3 No.-
This paper proposes a machine independent high level microprogramming language C(HLML-C) Which has similar structure to C-language. The proposed HLML-C can extend to special mocrooperations of a target machines, and can represent various hardware resources of target machine. At the intermediate step, a microprogram written in this language is translated to machine independent intermediate language (MIIL) that is 3-address code format defined to be excuted on the abstract machine generalized to include the characteristics of the various machines. This proposed system is implemented with C language and yacc on VAX 11/750 computer.
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