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Zhang Yan-Ze,Chen Xiao-Yue,Si Jun-Jie,He Ze-Yu,Wen Xi-Shan 대한전기학회 2023 Journal of Electrical Engineering & Technology Vol.18 No.5
Disconnector operation in GIS generates VFTO and TEV, which threaten device insulation and personnel safety. In order to calculate VFTO and TEV more accurately, this paper proposes a VFTO-TEV joint simulation model. Among them, dynamic arc model is used to reflect the dynamic characteristics of high frequency AC arc. In order to reflect the electromagnetic leakage phenomenon caused by the impedance mismatch of high-frequency electromagnetic waves, and the influence of the transient potential difference formed by the transient electromagnetic field on grounding grid on TEV, the geometric structures of high-voltage bushing, grounding pillars and grounding grid are modeled to obtain their respective frequency-dependent admittance matrices, which are converted into corresponding broadband equivalent circuit models by combining vector fitting method and impedance synthesis method. The above modeling method is applied to the 1000 kV GIS test circuit, and the simulation model is built in the ATP-EMTP electromagnetic transient program, and the joint simulation research of VFTO and TEV is carried out. The results show that at each measurement point of the test circuit, the amplitude error of the VFTO obtained by simulation and actual measurement is mostly less than 7%, and the frequency spectrum both contains the main frequency components of 18 MHz and 25 MHz; Compared with the traditional calculation model of obtaining VFTO/TEV using CIGRE model/Petersen's law, the amplitude of VFTO and TEV obtained by joint simulation model is lower and contains richer high-frequency components. In addition, the opening speed of 0.8 m/s also corresponds to the maximum point of the VFTO amplitude of the test circuit. Finally, based on the above modeling method, the effectiveness of adding ferrite beads to suppress VFTO is verified by simulation. © 2017 Elsevier Inc. All rights reserved.
Fast Circuit Simulation Based on Parallel-Distributed LIM using Cloud Computing System
Inoue, Yuta,Sekine, Tadatoshi,Hasegawa, Takahiro,Asai, Hideki The Institute of Electronics and Information Engin 2010 Journal of semiconductor technology and science Vol.10 No.1
This paper describes a fast circuit simulation technique using the latency insertion method (LIM) with a parallel and distributed leapfrog algorithm. The numerical simulation results on the PC cluster system that uses the cloud computing system are shown. As a result, it is confirmed that our method is very useful and practical.
Fast Circuit Simulation Based on Parallel-Distributed LIM using Cloud Computing System
Yuta Inoue,Tadatoshi Sekine,Takahiro Hasegawa,Hideki Asai 대한전자공학회 2010 Journal of semiconductor technology and science Vol.10 No.1
This paper describes a fast circuit simulation technique using the latency insertion method (LIM) with a parallel and distributed leapfrog algorithm. The numerical simulation results on the PC cluster system that uses the cloud computing system are shown. As a result, it is confirmed that our method is very useful and practical.
Fast Circuit Simulation Based on Parallel-Distributed LIM using Cloud Computing System
Yuta Inoue,Tadatoshi Sekine,Takahiro Hasegawa,Hideki Asai 대한전자공학회 2009 ITC-CSCC :International Technical Conference on Ci Vol.2009 No.7
This paper describes a fast circuit simulation technique using the latency insertion method (LIM) with a parallel distributed leapfrog algorithm. The numerical simulation results with the cluster that uses the cloud computing system are shown. As a result, it is confirmed that our method is very useful and practical.