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Shinhyuk Yang,Doo-Hee Cho,Min Ki Ryu,Sang-Hee Ko Park,Chi-Sun Hwang,Jin Jang,Jae Kyeong Jeong IEEE 2010 IEEE electron device letters Vol.31 No.2
<P>We fabricated high-performance thin-film transistors (TFTs) with an amorphous-Al-Sn-Zn-In-O (a-AT-ZIO) channel deposited by cosputtering using a dual Al-Zn-O and In-Sn-O target. The fabricated AT-ZIO TFTs, which feature a bottom-gate and bottom-contact configuration, exhibited a high field-effect mobility of 31.9 cm<SUP>2</SUP>/V·s, an excellent subthreshold gate swing of 0.07 V/decade, and a high <I>I</I> <SUB>on/off</SUB> ratio of >10<SUP>9</SUP>, even below the process temperature of 250°C. In addition, we demonstrated that the temperature and bias-induced stability of the bottom-gate TFT structure can significantly be improved by adopting a suitable passivation layer of atomic-layer-deposition-derived Al<SUB>2</SUB>O<SUB>3</SUB> thin film.</P>
Shinhyuk Yang,Jeong-Ik Lee,Sang-Hee Ko Park,Woo-Seok Cheong,Doo-Hee Cho,Sung-Min Yoon,Chun-Won Byun,Chi-Sun Hwang,Hye-Yong Chu,Kyoung-Ik Cho,Taek Ahn,Yoojeong Choi,Mi Hye Yi,Jin Jang IEEE 2010 IEEE electron device letters Vol.31 No.5
<P>We fabricated environmentally stable and transparent organic/oxide hybrid transistor on a glass substrate using the conventional photolithography. The obtained device, which was composed of an In-Ga-Zn-O active layer/soluble polyimide (KSPI) organic insulator, showed a mobility of 6.65 cm<SUP>2</SUP>/Vs, a subthreshold swing slope of 350 mV/decade, a threshold voltage (<I>VT</I>) of 3.10 V, and an on-off ratio of 3.9 × 10<SUP>9</SUP>. The transistor also showed good uniformity characteristics and was found to be environmentally stable for 90 days under ambient conditions.</P>
Shinhyuk Yang,Jun Yong Bak,Sung-Min Yoon,Min Ki Ryu,Himchan Oh,Chi-Sun Hwang,Gi Heon Kim,Sang-Hee Ko Park,Jin Jang IEEE 2011 IEEE electron device letters Vol.32 No.12
<P>In-Ga-Zn-O thin-film transistors processed at 150°C on laminated polyethylene naphthalate substrates exhibit ing high electrical performances such as a saturation mobility of 24.26 cm<SUP>2</SUP>/(V · s), a subthreshold slope of 140 mV/dec, a turn-on voltage V<SUB>on</SUB> of -0.41 V, and an on-off ratio of 1.8 × 10<SUP>9</SUP> were fabricated. Cool-off-type adhesive was adopted to easily detach the plastic substrate from the carrier holder. Devices also showed highly uniform characteristics with a variation of 0.09 V in turn-on voltage. Stability characteristics under the positive gate bias stress can be enhanced by increasing the annealing time at 150°C.</P>
Oxide Semiconductor-Based Organic/Inorganic Hybrid Dual-Gate Nonvolatile Memory Thin-Film Transistor
Sung-Min Yoon,Shinhyuk Yang,Min-Ki Ryu,Chun-Won Byun,Soon-Won Jung,Sang-Hee Ko Park,Chi-Sun Hwang,Kyoung-Ik Cho IEEE 2011 IEEE transactions on electron devices Vol.58 No.7
<P>An organic/inorganic hybrid dual-gate (DG) nonvolatile memory thin-film transistor (M-TFT) was proposed as a device with high potential for implementing large-area electronics on flexible and/or transparent substrates. The active channel and bottom and top gate insulators (GIs) of the M-TFT were composed of In-Ga-Zn-O, Al<SUB>2</SUB>O<SUB>3</SUB>, and poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)], respectively. It was confirmed that the fabricated DG M-TFT showed excellent device characteristics, in which the obtained field-effect mobility, subthreshold swing, and on/off ratio were approximately 32.1 cm<SUP>2</SUP> V<SUP>-1</SUP> s<SUP>-1</SUP>, 0.13 V/dec, and 10<SUP>8</SUP>, respectively. It was also successfully demonstrated that the DG configuration for the proposed M-TFT could effectively work for improving the device controllability by individually controlling the bias conditions of the top gate and bottom gate (BG). The turn-on voltage could be dynamically modulated and controlled when an appropriate fixed negative voltage was applied to the BG. The required duration of the programming pulse to obtain a memory margin of more than 10 could be reduced to 100 μs. These results correspond to the first demonstration of a hybrid-type DG M-TFT using a ferroelectric copolymer GI/oxide semiconducting active channel structure and demonstrate the feasibility of a promising memory device embeddable in a large-area electronic system.</P>
Jun Yong Bak,Shinhyuk Yang,Ho-Jun Ryu,Sang Hee Ko Park,Chi Sun Hwang,Sung Min Yoon IEEE 2014 IEEE transactions on electron devices Vol.61 No.1
<P>An In-Ga-O (IGO) semiconductor was employed as a channel layer for the oxide thin-film transistors (TFTs). The IGO composition was chosen as an In/Ga atomic ratio of 65/35 and the films were deposited by RF magnetron sputtering method. To investigate the negative-bias illumination stress (NBIS) instability mechanisms, the IGO films were prepared with various oxygen partial pressures (O<SUB>2</SUB>/Ar+O<SUB>2</SUB> and P<SUB>O2</SUB>). The saturation mobilities of TFTs decreased with increasing P<SUB>O2</SUB>, which suggested that the increase in P<SUB>O2</SUB> reduced the carrier concentration. The NBIS characteristics of the TFTs were evaluated with the amounts of negative shifts in turn-on voltages (ΔV<SUB>ON</SUB>) under the illumination of typical red, green, and blue wavelengths with a V<SUB>GS</SUB> of -20 V for 10<SUP>4</SUP> s. The X-ray photoelectron spectroscopy analysis strongly suggested that the ΔV<SUB>ON</SUB> could be caused by the weakening of bonding strength between the atoms, which were analyzed as variations in the red shifts of O 1s peak. The drastic increase in the ΔV<SUB>ON</SUB> of the TFT using the IGO prepared without oxygen under the NBIS using the blue illumination was well explained by the combination defect model composed of intrinsic and extrinsic defects inherent within the IGO channel layer.</P>
Yoon, Sung‐,Min,Yang, Shinhyuk,Byun, Chunwon,Park, Sang‐,Hee K.,Cho, Doo‐,Hee,Jung, Soon‐,Won,Kwon, Oh‐,Sang,Hwang, Chi‐,Sun WILEY‐VCH Verlag 2010 Advanced Functional Materials Vol.20 No.6
<P><B>Abstract</B></P>10.1002/adfm.200902095.abs<P>A fully transparent non‐volatile memory thin‐film transistor (T‐MTFT) is demonstrated. The gate stack is composed of organic ferroelectric poly(vinylidene fluoride‐trifluoroethylene) [P(VDF‐TrFE)] and oxide semiconducting Al‐Zn‐Sn‐O (AZTO) layers, in which thin Al<SUB>2</SUB>O<SUB>3</SUB> is introduced between two layers. All the fabrication processes are performed below 200 °C on the glass substrate. The transmittance of the fabricated device was more than 90% at the wavelength of 550 nm. The memory window obtained in the T‐MTFT was 7.5 V with a gate voltage sweep of −10 to 10 V, and it was still 1.8 V even with a lower voltage sweep of −6 to 6 V. The field‐effect mobility, subthreshold swing, on/off ratio, and gate leakage currents were obtained to be 32.2 cm<SUP>2</SUP> V<SUP>−1</SUP> s<SUP>−1</SUP>, 0.45 V decade<SUP>−1</SUP>, 10<SUP>8</SUP>, and 10<SUP>−13</SUP> A, respectively. All these characteristics correspond to the best performances among all types of non‐volatile memory transistors reported so far, although the programming speed and retention time should be more improved.</P>
Channel Protection Layer Effect on the Performance of Oxide TFTs
박상희,Doo-Hee Cho,황치선,Shinhyuk Yang,Min Ki Ryu,Chun-Won Byun,윤성민,Woo-Seok Cheong,Kyoung Ik Cho,전재홍 한국전자통신연구원 2009 ETRI Journal Vol.31 No.6
We have investigated the channel protection layer (PL) effect on the performance of an oxide thin film transistor (TFT) with a staggered top gate ZnO TFT and Al-doped zinc tin oxide (AZTO) TFT. Deposition of an ultra-thin PL on oxide semiconductor films enables TFTs to behave well by protecting the channel from a photo-resist (PR) stripper which removes the depleted surface of the active layer and increases the carrier amount in the channel. In addition, adopting a PL prevents channel contamination from the organic PR and results in high mobility and small subthreshold swings. The PL process plays a critical role in the performance of oxide TFTs. When a plasma process is introduced on the surface of an active layer during the PL process, and as the plasma power is increased, the TFT characteristics degrade, resulting in lower mobility and higher threshold voltage. Therefore, it is very important to form an interface using a minimized plasma process.
Improved Stability of Atomic Layer Deposited ZnO Thin Film Transistor by Intercycle Oxidation
Himchan Oh,박상희,Min Ki Ryu,황치선,Shinhyuk Yang,Oh Sang Kwon 한국전자통신연구원 2012 ETRI Journal Vol.34 No.2
By inserting H2O treatment steps during atomic layer deposition of a ZnO layer, the turn-on voltage shift from negative bias stress (NBS) under illumination was reduced considerably compared to that of a device that has a continuously grown ZnO layer without any treatment steps. Meanwhile, treatment steps without introducing reactive gases, and simply staying under a low working pressure, aggravated the instability under illuminated NBS due to an increase of oxygen vacancy concentration in the ZnO layer. From the experiment results, additional oxidation of the ZnO channel layer is proven to be effective in improving the stability against illuminated NBS.