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송오성(Song Ohsung),이상돈(Yi Sandon),김득중(Kim Dugjoong) 한국산학기술학회 2004 한국산학기술학회 학술대회 Vol.- No.-
초고속 RF IC의 핵심소자인 SiGe에피택시층을 가진 이종양극트란지스터 (hetero junction bipolar tansistor: HBT)를 0.35um급 CMOS공정으로 제작하였다. 이때 low VBE영역에서의 Current Gain의 선형성을 향상시키기 위하여 Capping 실리콘의 두께를 200과 300A으로 나누고 EDR (Emitter Drive-in RTA)의 온도와 시간을 900~1000C, 0~30sec로 각각 변화시키면서 최적조건을 알아보았다. 실험범위 내에서의 최적공정조건은 300A의 capping 실리콘과 975C-30sec의 EDR조건이었다.
정영순(Youngsoon Jung),송오성(Ohsung Song),김득중(Dugjoong Kim),최용윤(Yongyun Choi),김종준(Chongjun Kim) 한국표면공학회 2005 한국표면공학회지 Vol.38 No.1
We prepared nickel silicide layers from p-Si(100)/SiO₂(2000 Å)/poly-Si(700 Å)/Ni(400 Å) structures, feasible for gates in MOSFETs, by annealing them from 500℃~900℃ for 30 minutes. We measured the color coordination in visible range, cross sectional micro-structure, and surface topology with annealing temperature by an UV-VIS-IR spectrometer, field effect scanning electron microscope(FE-SEM), and scanning probe microscope respectively. We conclude that we may identify the nickel silicide by color difference of 0.90 and predict the silicide process reliability by color coordination measurement. The nickel silicide layers showed similar thickness while the columnar grains size and surface roughness increased as annealing temperature increased.
송오성,정성희,김득중,Song Ohsung,Cheong Seonghwee,Kim Dugjoong 한국재료학회 2004 한국재료학회지 Vol.14 No.12
NiCo silicide films have been fabricated from $300{\AA}-thick\;Ni_{1-x}Co_{x}(x=0.1\sim0.9)$ on Si-substrates by varying RTA(rapid thermal annealing) temperatures from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 sec. Sheet resistance, cross-sectional microstructure, and chemical composition evolution were measured by a four point probe, a transmission electron microscope(TEM), and an Auger depth profilemeter, respectively. For silicides of the all composition and temperatures except for $80\%$ of the Ni composition, we observed small sheet resistance of sub- $7\;{\Omega}/sq.,$ which was stable even at $1100^{\circ}C$. We report that our newly proposed NiCo silicides may obtain sub 50 nm-thick films by tunning the nickel composition and silicidation temperature. New NiCo silicides from NiCo-alloys may be more appropriate for sub-0.1${\mu}m$ CMOS process, compared to conventional single phase or stacked composit silicides.
Co/Ni 복합실리사이드의 메탈 콘택 건식식각 안정성 연구
송오성,범성진,김득중,Song Ohsung,Beom Sungjin,Kim Dugjoong 한국재료학회 2004 한국재료학회지 Vol.14 No.8
Newly developed silicide materials for ULSI should have the appropriate electrical property of low resistant as well as process compatibility in conventional CMOS process. We prepared $NiCoSi_x$ silicides from 15 nm-Co/15 nm-Ni/Si structure and performed contact dry etch process to confirm the dry etch stability and compatibility of $NiCoSi_x$ layers. We dry etched the photoresist/SiO/silicide/silicon patterns with $CF_4\;and\;CHF_3$ gases with varying powers from 100 to 200 W, and pressures from 45 to 65 mTorr, respectively. Polysilicon and silicon active layers without silicide were etched $0\sim316{\AA}$ during over etch time of 3min, while silicon layers with proposed $NiCoSi_x$ silicide were not etched and showed stable surfaces. Our result implies that new $NiCoSi_x$ silicides may replace the conventional silicides due to contact etch process compatibility.
코발트/니켈 적층구조 박막으로부터 형성된 복합실리사이드
송오성,정성희,김득중,최용윤,Song Ohsung,Cheong Seonghwee,Kim Dugjoong,Choi Yongyun 한국재료학회 2004 한국재료학회지 Vol.14 No.11
15 nm-Co/15 nm-Ni/P-Si(100)[Type I] and 15 nm-Ni/15 nm-Co/P-Si(100)(Type II) bilayer structures were annealed using a rapid thermal annealer for 40sec at $700/sim1100^{\circ}C$. The annealed bilayer structures developed into composite NiCo silicides and resulting changes in sheet resistance, composition and microstructure were investigated using Auger electron spectroscopy and transmission electron microscopy. Prepared NiCoSix films were further treated in a sequential annealing set up from $900\sim1100^{\circ}C$ with 30 minutes. The sheet resistances of NiCoSix from Type I maintained less than $7\;{\Omega}/sq$. even at the temperature of $1100{\circ}C$, while those of Type II showed about $5\;{\Omega}/sq$. with the thinner and more uniform thickness. With the additive post annealing, the sheet resistance for all the composite silicides remained small up to $900^{\circ}C$. The proposed NiCoSix films were superior over the conventional single-phased silicides and may be easily incorporated into the sub-0.1 ${\mu}m$ process.
직접접합 실리콘/실리콘질화막//실리콘산화막/실리콘 기판쌍의 선형가열에 의한 보이드 결함 제거
정영순,송오성,김득중,주영철,Jung Youngsoon,Song Ohsung,Kim Dugjoong,Joo Youngcheol 한국재료학회 2004 한국재료학회지 Vol.14 No.5
The void evolution in direct bonding process of $Si/Si_3$$N_4$ ∥ $SiO_2$/Si silicon wafer pairs has been investigated with an infrared camera. The voids that formed in the premating process grew in the conventional furnace annealing process at a temperature of $600^{\circ}C$. The voids are never shrunken even with the additional annealing process at the higher temperatures. We observed that the voids became smaller and disappeared with sequential scanning by our newly proposed fast linear annealing(FLA). FLA irradiates the focused line-shape halogen light on the surface while wafer moves from one edge to the other. We also propose the void shrinking mechanism in FLA with the finite differential method (FDM). Our results imply that we may eliminate the voids and enhance the yield for the direct bonding of wafer pairs by employing FLA.